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7c5338d71e
- Add pl310.disable tunable to disable L2 cache altogether. In
order to make sure that it's 100% disabled we use cache event
counters for cache line eviction and read allocate events
and panic if any of these counters increased. This is purely
for debugging purpose
- Direct access DEBUG_CTRL and CTRL might be unavailable in
unsecure mode, so use platform-specific functions for
these registers
- Replace #if 1 with proper erratum numbers
- Add erratum 753970 workaround
- Remove wait function for atomic operations
- Protect cache operations with spin mutex in order to prevent race condition
- Disable instruction cache prefetch and make sure data cache
prefetch is enabled in OMAP4-specific intialization
53 lines
2.1 KiB
C
53 lines
2.1 KiB
C
/*-
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* Copyright (c) 2012 Olivier Houchard. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* $FreeBSD$
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*/
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#ifndef OMAP4_SMC_H_
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#define OMAP4_SMC_H_
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/* Define the various function IDs used by the OMAP4 */
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#define L2CACHE_WRITE_DEBUG_REG 0x100
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#define L2CACHE_CLEAN_INV_RANG 0x101
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#define L2CACHE_WRITE_CTRL_REG 0x102
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#define READ_AUX_CORE_REGS 0x103
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#define MODIFY_AUX_CORE_0 0x104
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#define WRITE_AUX_CORE_1 0x105
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#define READ_WKG_CTRL_REG 0x106
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#define CLEAR_WKG_CTRL_REG 0x107
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#define SET_POWER_STATUS_REG 0x108
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#define WRITE_AUXCTRL_REG 0x109
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#define LOCKDOWN_TLB 0x10a
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#define SELECT_TLB_ENTRY_FOR_WRITE 0x10b
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#define READ_TLB_VA_ENTRY 0x10c
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#define WRITE_TLB_VA_ENTRY 0x10d
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#define READ_TLB_PA_ENTRY 0x10e
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#define WRITE_TLB_PA_ENTRY 0x10f
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#define READ_TLB_ATTR_ENTRY 0x110
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#define WRITE_TLB_ATTR_ENTRY 0x111
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#define WRITE_LATENCY_CTRL_REG 0x112
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#define WRITE_PREFETCH_CTRL_REG 0x113
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#endif /* OMAP4_SMC_H_ */
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