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81c1993f87
- vector.s <- stub called by i386/exception.s - icu_vector.s <- UP - apic_vector.s <- SMP Split icu.s into UP and SMP specific files: - ipl.s <- stub called by i386/exception.s (formerly icu.s) - icu_ipl.s <- UP - apic_ipl.s <- SMP This was done in preparation for massive changes to the SMP INTerrupt mechanisms. More fine tuning, such as merging ipl.s into exception.s, may be appropriate.
307 lines
8.5 KiB
ArmAsm
307 lines
8.5 KiB
ArmAsm
/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: apic_vector.s,v 1.2 1997/05/24 17:05:26 smp Exp smp $
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*/
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/* convert an absolute IRQ# into a bitmask */
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#define IRQ_BIT(irq_num) (1 << (irq_num))
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/* make an index into the IO APIC from the IRQ# */
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#define REDTBL_IDX(irq_num) (0x10 + ((irq_num) * 2))
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/*
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* 'lazy masking' code submitted by: Bruce Evans <bde@zeta.org.au>
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*/
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#define MAYBE_MASK_IRQ(irq_num) \
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testl $IRQ_BIT(irq_num),iactive ; /* lazy masking */ \
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je 1f ; /* NOT currently active */ \
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orl $IRQ_BIT(irq_num),_imen ; /* set the mask bit */ \
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movl _io_apic_base,%ecx ; /* io apic addr */ \
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movl $REDTBL_IDX(irq_num),(%ecx) ; /* write the index */ \
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movl IOAPIC_WINDOW(%ecx),%eax ; /* current value */ \
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orl $IOART_INTMASK,%eax ; /* set the mask */ \
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movl %eax,IOAPIC_WINDOW(%ecx) ; /* new value */ \
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movl _apic_base, %eax ; \
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movl $0, APIC_EOI(%eax) ; \
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orl $IRQ_BIT(irq_num), _ipending ; \
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REL_MPLOCK ; /* SMP release global lock */ \
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popl %es ; \
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popl %ds ; \
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popal ; \
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addl $4+4,%esp ; \
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iret ; \
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; \
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ALIGN_TEXT ; \
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1: ; \
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orl $IRQ_BIT(irq_num),iactive
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#define MAYBE_UNMASK_IRQ(irq_num) \
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cli ; /* must unmask _imen and icu atomically */ \
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andl $~IRQ_BIT(irq_num),iactive ; \
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testl $IRQ_BIT(irq_num),_imen ; \
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je 2f ; \
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andl $~IRQ_BIT(irq_num),_imen ; /* clear mask bit */ \
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movl _io_apic_base,%ecx ; /* io apic addr */ \
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movl $REDTBL_IDX(irq_num),(%ecx) ; /* write the index */ \
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movl IOAPIC_WINDOW(%ecx),%eax ; /* current value */ \
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andl $~IOART_INTMASK,%eax ; /* clear the mask */ \
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movl %eax,IOAPIC_WINDOW(%ecx) ; /* new value */ \
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2: ; \
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sti ; /* XXX _doreti repeats the cli/sti */
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/*
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* Macros for interrupt interrupt entry, call to handler, and exit.
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*/
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#define FAST_INTR(irq_num, vec_name) \
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.text ; \
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SUPERALIGN_TEXT ; \
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IDTVEC(vec_name) ; \
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pushl %eax ; /* save only call-used registers */ \
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pushl %ecx ; \
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pushl %edx ; \
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pushl %ds ; \
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MAYBE_PUSHL_ES ; \
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movl $KDSEL,%eax ; \
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movl %ax,%ds ; \
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MAYBE_MOVW_AX_ES ; \
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FAKE_MCOUNT((4+ACTUALLY_PUSHED)*4(%esp)) ; \
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GET_MPLOCK ; /* SMP Spin lock */ \
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pushl _intr_unit + (irq_num) * 4 ; \
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call *_intr_handler + (irq_num) * 4 ; /* do the work ASAP */ \
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movl _apic_base, %eax ; \
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movl $0, APIC_EOI(%eax) ; \
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addl $4,%esp ; \
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incl _cnt+V_INTR ; /* book-keeping can wait */ \
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movl _intr_countp + (irq_num) * 4,%eax ; \
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incl (%eax) ; \
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movl _cpl,%eax ; /* unmasking pending HWIs or SWIs? */ \
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notl %eax ; \
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andl _ipending,%eax ; \
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jne 2f ; /* yes, maybe handle them */ \
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1: ; \
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MEXITCOUNT ; \
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REL_MPLOCK ; /* SMP release global lock */ \
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MAYBE_POPL_ES ; \
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popl %ds ; \
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popl %edx ; \
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popl %ecx ; \
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popl %eax ; \
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iret ; \
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; \
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ALIGN_TEXT ; \
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2: ; \
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cmpb $3,_intr_nesting_level ; /* enough stack? */ \
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jae 1b ; /* no, return */ \
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movl _cpl,%eax ; \
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/* XXX next line is probably unnecessary now. */ \
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movl $HWI_MASK|SWI_MASK,_cpl ; /* limit nesting ... */ \
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incb _intr_nesting_level ; /* ... really limit it ... */ \
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sti ; /* to do this as early as possible */ \
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MAYBE_POPL_ES ; /* discard most of thin frame ... */ \
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popl %ecx ; /* ... original %ds ... */ \
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popl %edx ; \
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xchgl %eax,4(%esp) ; /* orig %eax; save cpl */ \
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pushal ; /* build fat frame (grrr) ... */ \
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pushl %ecx ; /* ... actually %ds ... */ \
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pushl %es ; \
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movl $KDSEL,%eax ; \
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movl %ax,%es ; \
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movl (2+8+0)*4(%esp),%ecx ; /* %ecx from thin frame ... */ \
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movl %ecx,(2+6)*4(%esp) ; /* ... to fat frame ... */ \
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movl (2+8+1)*4(%esp),%eax ; /* ... cpl from thin frame */ \
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pushl %eax ; \
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subl $4,%esp ; /* junk for unit number */ \
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MEXITCOUNT ; \
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jmp _doreti
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#define INTR(irq_num, vec_name) \
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.text ; \
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SUPERALIGN_TEXT ; \
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IDTVEC(vec_name) ; \
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pushl $0 ; /* dummy error code */ \
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pushl $0 ; /* dummy trap type */ \
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pushal ; \
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pushl %ds ; /* save data and extra segments ... */ \
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pushl %es ; \
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movl $KDSEL,%eax ; /* ... and reload with kernel's ... */ \
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movl %ax,%ds ; /* ... early for obsolete reasons */ \
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movl %ax,%es ; \
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GET_MPLOCK ; /* SMP Spin lock */ \
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MAYBE_MASK_IRQ(irq_num) ; \
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movl _apic_base, %eax ; \
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movl $0, APIC_EOI(%eax) ; \
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movl _cpl,%eax ; \
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testl $IRQ_BIT(irq_num), %eax ; \
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jne 3f ; \
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incb _intr_nesting_level ; \
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__CONCAT(Xresume,irq_num): ; \
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FAKE_MCOUNT(12*4(%esp)) ; /* XXX late to avoid dbl cnt */ \
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incl _cnt+V_INTR ; /* tally interrupts */ \
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movl _intr_countp + (irq_num) * 4,%eax ; \
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incl (%eax) ; \
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movl _cpl,%eax ; \
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pushl %eax ; \
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pushl _intr_unit + (irq_num) * 4 ; \
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orl _intr_mask + (irq_num) * 4,%eax ; \
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movl %eax,_cpl ; \
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sti ; \
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call *_intr_handler + (irq_num) * 4 ; \
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MAYBE_UNMASK_IRQ(irq_num) ; \
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MEXITCOUNT ; \
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jmp _doreti ; \
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; \
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ALIGN_TEXT ; \
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3: ; \
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/* XXX skip mcounting here to avoid double count */ \
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orl $IRQ_BIT(irq_num), _ipending ; \
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REL_MPLOCK ; /* SMP release global lock */ \
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popl %es ; \
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popl %ds ; \
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popal ; \
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addl $4+4,%esp ; \
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iret
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.text
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SUPERALIGN_TEXT
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.globl _Xinvltlb
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_Xinvltlb:
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pushl %eax
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movl %cr3, %eax /* invalidate the TLB */
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movl %eax, %cr3
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ss /* stack segment, avoid %ds load */
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movl _apic_base, %eax
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ss
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movl $0, APIC_EOI(%eax) /* End Of Interrupt to APIC */
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popl %eax
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iret
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MCOUNT_LABEL(bintr)
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FAST_INTR(0,fastintr0)
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FAST_INTR(1,fastintr1)
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FAST_INTR(2,fastintr2)
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FAST_INTR(3,fastintr3)
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FAST_INTR(4,fastintr4)
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FAST_INTR(5,fastintr5)
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FAST_INTR(6,fastintr6)
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FAST_INTR(7,fastintr7)
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FAST_INTR(8,fastintr8)
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FAST_INTR(9,fastintr9)
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FAST_INTR(10,fastintr10)
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FAST_INTR(11,fastintr11)
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FAST_INTR(12,fastintr12)
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FAST_INTR(13,fastintr13)
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FAST_INTR(14,fastintr14)
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FAST_INTR(15,fastintr15)
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FAST_INTR(16,fastintr16)
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FAST_INTR(17,fastintr17)
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FAST_INTR(18,fastintr18)
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FAST_INTR(19,fastintr19)
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FAST_INTR(20,fastintr20)
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FAST_INTR(21,fastintr21)
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FAST_INTR(22,fastintr22)
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FAST_INTR(23,fastintr23)
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INTR(0,intr0)
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INTR(1,intr1)
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INTR(2,intr2)
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INTR(3,intr3)
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INTR(4,intr4)
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INTR(5,intr5)
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INTR(6,intr6)
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INTR(7,intr7)
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INTR(8,intr8)
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INTR(9,intr9)
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INTR(10,intr10)
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INTR(11,intr11)
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INTR(12,intr12)
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INTR(13,intr13)
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INTR(14,intr14)
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INTR(15,intr15)
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INTR(16,intr16)
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INTR(17,intr17)
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INTR(18,intr18)
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INTR(19,intr19)
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INTR(20,intr20)
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INTR(21,intr21)
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INTR(22,intr22)
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INTR(23,intr23)
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MCOUNT_LABEL(eintr)
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.data
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ihandlers: /* addresses of interrupt handlers */
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/* actually resumption addresses for HWI's */
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.long Xresume0, Xresume1, Xresume2, Xresume3
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.long Xresume4, Xresume5, Xresume6, Xresume7
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.long Xresume8, Xresume9, Xresume10, Xresume11
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.long Xresume12, Xresume13, Xresume14, Xresume15
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.long Xresume16, Xresume17, Xresume18, Xresume19
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.long Xresume20, Xresume21, Xresume22, Xresume23
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.long 0, 0, 0, 0
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.long swi_tty, swi_net, _softclock, swi_ast
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imasks: /* masks for interrupt handlers */
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.space NHWI*4 /* padding; HWI masks are elsewhere */
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.long 0, 0, 0, 0
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.long SWI_TTY_MASK, SWI_NET_MASK, SWI_CLOCK_MASK, SWI_AST_MASK
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.globl _ivectors
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_ivectors:
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.long _Xintr0, _Xintr1, _Xintr2, _Xintr3
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.long _Xintr4, _Xintr5, _Xintr6, _Xintr7
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.long _Xintr8, _Xintr9, _Xintr10, _Xintr11
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.long _Xintr12, _Xintr13, _Xintr14, _Xintr15
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.long _Xintr16, _Xintr17, _Xintr18, _Xintr19
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.long _Xintr20, _Xintr21, _Xintr22, _Xintr23
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/* active flag for lazy masking */
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iactive:
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.long 0
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/*
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* Interrupt counters and names. The format of these and the label names
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* must agree with what vmstat expects. The tables are indexed by device
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* ids so that we don't have to move the names around as devices are
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* attached.
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*/
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#include "vector.h"
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.globl _intrcnt, _eintrcnt
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_intrcnt:
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.space (NR_DEVICES + ICU_LEN) * 4
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_eintrcnt:
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.globl _intrnames, _eintrnames
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_intrnames:
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.ascii DEVICE_NAMES
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.asciz "stray irq0"
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.asciz "stray irq1"
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.asciz "stray irq2"
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.asciz "stray irq3"
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.asciz "stray irq4"
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.asciz "stray irq5"
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.asciz "stray irq6"
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.asciz "stray irq7"
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.asciz "stray irq8"
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.asciz "stray irq9"
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.asciz "stray irq10"
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.asciz "stray irq11"
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.asciz "stray irq12"
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.asciz "stray irq13"
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.asciz "stray irq14"
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.asciz "stray irq15"
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.asciz "stray irq16"
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.asciz "stray irq17"
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.asciz "stray irq18"
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.asciz "stray irq19"
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.asciz "stray irq20"
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.asciz "stray irq21"
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.asciz "stray irq22"
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.asciz "stray irq23"
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_eintrnames:
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.text
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