Peter Wemm ebb30c0b3a Add the CR4 values for P3 SIMD enabling support. FXSR tells the cpu that ... the OS does FXSAVE/FXRESTOR instructions (fast FPU save/restore) during context switching and also enables SIMD since this enables saving the extra CPU context that isn't saved with normal FPU regs. The other enables the SIMD instructions to use exception 16 (FPU) error reporting. Note, this doesn't turn on SIMD, just defines the bits.		1999-09-10 15:51:44 +00:00
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amd64	Add text for the PN (Processor serial number) and XMM (extended SIMD/MMX2/	1999-09-10 15:47:54 +00:00
conf	Seperate the miibus pci ethernet drivers from the non-miibus drivers so	1999-09-09 18:30:58 +00:00
include	Add the CR4 values for P3 SIMD enabling support. FXSR tells the cpu that	1999-09-10 15:51:44 +00:00
isa	This adds the i386 specific support for systems with a MicroChannel	1999-09-03 02:04:28 +00:00
pci	$Id$ -> $FreeBSD$	1999-08-28 01:08:13 +00:00
Makefile	$Id$ -> $FreeBSD$	1999-08-28 01:08:13 +00:00