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f09deb6962
There is no such thing as wierd in the english language.
983 lines
28 KiB
C
983 lines
28 KiB
C
/*
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* Copyright (c) 2000,2001 Jonathan Chen.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* Cardbus Bus Driver
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*
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* much of the bus code was stolen directly from sys/pci/pci.c
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* (Copyright (c) 1997, Stefan Esser <se@freebsd.org>)
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*
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* Written by Jonathan Chen <jon@freebsd.org>
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*/
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#define CARDBUS_DEBUG
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <pci/pcivar.h>
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#include <pci/pcireg.h>
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#include <sys/pciio.h>
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#include <dev/cardbus/cardbusreg.h>
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#include <dev/cardbus/cardbusvar.h>
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#include <dev/cardbus/cardbus_cis.h>
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#include "power_if.h"
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#include "card_if.h"
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#include "pcib_if.h"
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#if defined CARDBUS_DEBUG
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#define STATIC
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#define DPRINTF(a) printf a
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#define DEVPRINTF(x) device_printf x
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#else
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#define STATIC static
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#define DPRINTF(a)
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#define DEVPRINTF(x)
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#endif
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#if !defined(lint)
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static const char rcsid[] =
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"$FreeBSD$";
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#endif
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struct cardbus_quirk {
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u_int32_t devid; /* Vendor/device of the card */
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int type;
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#define CARDBUS_QUIRK_MAP_REG 1 /* PCI map register in weird place */
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int arg1;
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int arg2;
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};
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struct cardbus_quirk cardbus_quirks[] = {
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{ 0 }
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};
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static int cardbus_probe(device_t dev);
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static int cardbus_attach(device_t dev);
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static void device_setup_regs(device_t cbdev, int b, int s, int f,
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pcicfgregs *cfg);
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static int cardbus_attach_card(device_t dev);
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static int cardbus_detach_card(device_t dev, int flags);
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static struct cardbus_devinfo *cardbus_read_device(device_t pcib,
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int b, int s, int f);
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static void cardbus_hdrtypedata(device_t pcib, int b, int s, int f,
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pcicfgregs *cfg);
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static int cardbus_freecfg(struct cardbus_devinfo *dinfo);
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static void cardbus_print_verbose(struct cardbus_devinfo *dinfo);
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static int cardbus_set_resource(device_t dev, device_t child, int type,
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int rid, u_long start, u_long count);
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static int cardbus_get_resource(device_t dev, device_t child, int type,
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int rid, u_long *startp, u_long *countp);
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static void cardbus_delete_resource(device_t dev, device_t child, int type,
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int rid);
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static int cardbus_set_resource_method(device_t dev, device_t child, int type,
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int rid, u_long start, u_long count);
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static int cardbus_get_resource_method(device_t dev, device_t child, int type,
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int rid, u_long *startp, u_long *countp);
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static int cardbus_add_map(device_t bdev, device_t dev, pcicfgregs *cfg,
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int reg);
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static void cardbus_add_resources(device_t dev, pcicfgregs* cfg);
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static void cardbus_release_all_resources(device_t dev,
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struct resource_list *rl);
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static struct resource* cardbus_alloc_resource(device_t self, device_t child,
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int type, int* rid,u_long start,
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u_long end, u_long count,
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u_int flags);
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static int cardbus_release_resource(device_t dev, device_t child, int type,
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int rid, struct resource *r);
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static int cardbus_print_resources(struct resource_list *rl, const char *name,
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int type, const char *format);
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static int cardbus_print_child(device_t dev, device_t child);
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static void cardbus_probe_nomatch(device_t dev, device_t child);
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static int cardbus_read_ivar(device_t dev, device_t child, int which,
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u_long *result);
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static int cardbus_write_ivar(device_t dev, device_t child, int which,
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uintptr_t value);
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static u_int32_t cardbus_read_config_method(device_t dev, device_t child,
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int reg, int width);
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static void cardbus_write_config_method(device_t dev, device_t child, int reg,
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u_int32_t val, int width);
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/************************************************************************/
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/* Probe/Attach */
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/************************************************************************/
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static int
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cardbus_probe(device_t dev)
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{
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device_set_desc(dev, "Cardbus bus (newcard)");
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return 0;
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}
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static int
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cardbus_attach(device_t dev)
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{
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return 0;
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}
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static int
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cardbus_detach(device_t dev)
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{
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cardbus_detach_card(dev, DETACH_FORCE);
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return 0;
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}
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/************************************************************************/
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/* Attach/Detach card */
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/************************************************************************/
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static void
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device_setup_regs(device_t bdev, int b, int s, int f, pcicfgregs *cfg)
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{
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PCIB_WRITE_CONFIG(bdev, b, s, f, PCIR_INTLINE,
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pci_get_irq(device_get_parent(bdev)), 1);
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cfg->intline = PCIB_READ_CONFIG(bdev, b, s, f, PCIR_INTLINE, 1);
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PCIB_WRITE_CONFIG(bdev, b, s, f, PCIR_CACHELNSZ, 0x08, 1);
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cfg->cachelnsz = PCIB_READ_CONFIG(bdev, b, s, f, PCIR_CACHELNSZ, 1);
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PCIB_WRITE_CONFIG(bdev, b, s, f, PCIR_LATTIMER, 0xa8, 1);
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cfg->lattimer = PCIB_READ_CONFIG(bdev, b, s, f, PCIR_LATTIMER, 1);
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PCIB_WRITE_CONFIG(bdev, b, s, f, PCIR_MINGNT, 0x14, 1);
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cfg->mingnt = PCIB_READ_CONFIG(bdev, b, s, f, PCIR_MINGNT, 1);
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PCIB_WRITE_CONFIG(bdev, b, s, f, PCIR_MAXLAT, 0x14, 1);
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cfg->maxlat = PCIB_READ_CONFIG(bdev, b, s, f, PCIR_MAXLAT, 1);
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}
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static int
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cardbus_attach_card(device_t dev)
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{
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device_t bdev = device_get_parent(dev);
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int cardattached = 0;
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static int curr_bus_number = 2; /* XXX EVILE BAD (see below) */
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int bus, slot, func;
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cardbus_detach_card(dev, DETACH_NOWARN); /* detach existing cards */
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POWER_ENABLE_SOCKET(bdev, dev);
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bus = pcib_get_bus(dev);
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if (bus == 0) {
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/*
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* XXX EVILE BAD XXX
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* Not all BIOSes initialize the secondary bus number properly,
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* so if the default is bad, we just put one in and hope it
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* works.
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*/
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bus = curr_bus_number;
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pci_write_config (bdev, PCIR_SECBUS_2, curr_bus_number, 1);
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pci_write_config (bdev, PCIR_SUBBUS_2, curr_bus_number+2, 1);
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curr_bus_number += 3;
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}
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for (slot = 0; slot <= CARDBUS_SLOTMAX; slot++) {
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int cardbusfunchigh = 0;
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for (func = 0; func <= cardbusfunchigh; func++) {
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struct cardbus_devinfo *dinfo =
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cardbus_read_device(bdev, bus, slot, func);
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if (dinfo == NULL) continue;
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if (dinfo->cfg.mfdev)
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cardbusfunchigh = CARDBUS_FUNCMAX;
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device_setup_regs(bdev, bus, slot, func, &dinfo->cfg);
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cardbus_print_verbose(dinfo);
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dinfo->cfg.dev = device_add_child(dev, NULL, -1);
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if (!dinfo->cfg.dev) {
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DEVPRINTF((dev, "Cannot add child!\n"));
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cardbus_freecfg(dinfo);
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continue;
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}
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resource_list_init(&dinfo->resources);
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device_set_ivars(dinfo->cfg.dev, dinfo);
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cardbus_add_resources(dinfo->cfg.dev, &dinfo->cfg);
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cardbus_do_cis(dev, dinfo->cfg.dev);
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if (device_probe_and_attach(dinfo->cfg.dev) != 0) {
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cardbus_release_all_resources(dinfo->cfg.dev,
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&dinfo->resources);
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} else
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cardattached++;
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}
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}
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if (cardattached > 0) return 0;
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POWER_DISABLE_SOCKET(bdev, dev);
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return ENOENT;
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}
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static int
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cardbus_detach_card(device_t dev, int flags)
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{
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int numdevs;
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device_t *devlist;
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int tmp;
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int err=0;
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device_get_children(dev, &devlist, &numdevs);
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if (numdevs == 0) {
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if (!(flags & DETACH_NOWARN)) {
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DEVPRINTF((dev, "Detaching card: no cards to detach!\n"));
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POWER_DISABLE_SOCKET(device_get_parent(dev), dev);
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}
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return ENOENT;
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}
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for (tmp = 0; tmp < numdevs; tmp++) {
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struct cardbus_devinfo *dinfo = device_get_ivars(devlist[tmp]);
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int status = device_get_state(devlist[tmp]);
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if (status == DS_ATTACHED || status == DS_BUSY) {
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if (device_detach(dinfo->cfg.dev) == 0 ||
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flags & DETACH_FORCE){
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cardbus_release_all_resources(dinfo->cfg.dev,
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&dinfo->resources);
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device_delete_child(dev, devlist[tmp]);
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} else {
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err++;
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}
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cardbus_freecfg(dinfo);
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} else {
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device_delete_child(dev, devlist[tmp]);
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}
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}
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if (err == 0)
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POWER_DISABLE_SOCKET(device_get_parent(dev), dev);
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return err;
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}
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static void
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cardbus_driver_added(device_t dev, driver_t *driver)
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{
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int numdevs;
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device_t *devlist;
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device_t bdev = device_get_parent(dev);
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int tmp, cardattached;
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device_get_children(dev, &devlist, &numdevs);
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cardattached = 0;
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for (tmp = 0; tmp < numdevs; tmp++) {
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if (device_get_state(devlist[tmp]) != DS_NOTPRESENT)
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cardattached++;
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}
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if (cardattached == 0)
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POWER_ENABLE_SOCKET(bdev, dev);
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DEVICE_IDENTIFY(driver, dev);
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for (tmp = 0; tmp < numdevs; tmp++) {
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if (device_get_state(devlist[tmp]) == DS_NOTPRESENT){
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struct cardbus_devinfo *dinfo;
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dinfo = device_get_ivars(devlist[tmp]);
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resource_list_init(&dinfo->resources);
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cardbus_add_resources(dinfo->cfg.dev, &dinfo->cfg);
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cardbus_do_cis(dev, dinfo->cfg.dev);
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if (device_probe_and_attach(dinfo->cfg.dev) != 0) {
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cardbus_release_all_resources(dinfo->cfg.dev,
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&dinfo->resources);
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} else
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cardattached++;
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}
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}
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if (cardattached == 0)
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POWER_DISABLE_SOCKET(bdev, dev);
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}
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/************************************************************************/
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/* PCI-Like config reading (copied from pci.c */
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/************************************************************************/
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/* read configuration header into pcicfgrect structure */
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static struct cardbus_devinfo *
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cardbus_read_device(device_t pcib, int b, int s, int f)
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{
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#define REG(n, w) PCIB_READ_CONFIG(pcib, b, s, f, n, w)
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pcicfgregs *cfg = NULL;
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struct cardbus_devinfo *devlist_entry = NULL;
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if (PCIB_READ_CONFIG(pcib, b, s, f, PCIR_DEVVENDOR, 4) != -1) {
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devlist_entry = malloc(sizeof(struct cardbus_devinfo),
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M_DEVBUF, M_WAITOK | M_ZERO);
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if (devlist_entry == NULL)
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return (NULL);
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cfg = &devlist_entry->cfg;
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cfg->bus = b;
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cfg->slot = s;
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cfg->func = f;
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cfg->vendor = REG(PCIR_VENDOR, 2);
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cfg->device = REG(PCIR_DEVICE, 2);
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cfg->cmdreg = REG(PCIR_COMMAND, 2);
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cfg->statreg = REG(PCIR_STATUS, 2);
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cfg->baseclass = REG(PCIR_CLASS, 1);
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cfg->subclass = REG(PCIR_SUBCLASS, 1);
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cfg->progif = REG(PCIR_PROGIF, 1);
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cfg->revid = REG(PCIR_REVID, 1);
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cfg->hdrtype = REG(PCIR_HEADERTYPE, 1);
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cfg->cachelnsz = REG(PCIR_CACHELNSZ, 1);
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cfg->lattimer = REG(PCIR_LATTIMER, 1);
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cfg->intpin = REG(PCIR_INTPIN, 1);
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cfg->intline = REG(PCIR_INTLINE, 1);
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#ifdef __alpha__
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alpha_platform_assign_pciintr(cfg);
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#endif
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#ifdef APIC_IO
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if (cfg->intpin != 0) {
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int airq;
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airq = pci_apic_irq(cfg->bus, cfg->slot, cfg->intpin);
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if (airq >= 0) {
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/* PCI specific entry found in MP table */
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if (airq != cfg->intline) {
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undirect_pci_irq(cfg->intline);
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cfg->intline = airq;
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}
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} else {
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/*
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* PCI interrupts might be redirected to the
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* ISA bus according to some MP tables. Use the
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* same methods as used by the ISA devices
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* devices to find the proper IOAPIC int pin.
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*/
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airq = isa_apic_irq(cfg->intline);
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if ((airq >= 0) && (airq != cfg->intline)) {
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/* XXX: undirect_pci_irq() ? */
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undirect_isa_irq(cfg->intline);
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cfg->intline = airq;
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}
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}
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}
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#endif /* APIC_IO */
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cfg->mingnt = REG(PCIR_MINGNT, 1);
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cfg->maxlat = REG(PCIR_MAXLAT, 1);
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cfg->mfdev = (cfg->hdrtype & PCIM_MFDEV) != 0;
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cfg->hdrtype &= ~PCIM_MFDEV;
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cardbus_hdrtypedata(pcib, b, s, f, cfg);
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devlist_entry->conf.pc_sel.pc_bus = cfg->bus;
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devlist_entry->conf.pc_sel.pc_dev = cfg->slot;
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devlist_entry->conf.pc_sel.pc_func = cfg->func;
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devlist_entry->conf.pc_hdr = cfg->hdrtype;
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devlist_entry->conf.pc_subvendor = cfg->subvendor;
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devlist_entry->conf.pc_subdevice = cfg->subdevice;
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devlist_entry->conf.pc_vendor = cfg->vendor;
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devlist_entry->conf.pc_device = cfg->device;
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devlist_entry->conf.pc_class = cfg->baseclass;
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devlist_entry->conf.pc_subclass = cfg->subclass;
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devlist_entry->conf.pc_progif = cfg->progif;
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devlist_entry->conf.pc_revid = cfg->revid;
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}
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return (devlist_entry);
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#undef REG
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}
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/* extract header type specific config data */
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static void
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cardbus_hdrtypedata(device_t pcib, int b, int s, int f, pcicfgregs *cfg)
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{
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#define REG(n, w) PCIB_READ_CONFIG(pcib, b, s, f, n, w)
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switch (cfg->hdrtype) {
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case 0:
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cfg->subvendor = REG(PCIR_SUBVEND_0, 2);
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cfg->subdevice = REG(PCIR_SUBDEV_0, 2);
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cfg->nummaps = PCI_MAXMAPS_0;
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break;
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case 1:
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cfg->subvendor = REG(PCIR_SUBVEND_1, 2);
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cfg->subdevice = REG(PCIR_SUBDEV_1, 2);
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cfg->nummaps = PCI_MAXMAPS_1;
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break;
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case 2:
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cfg->subvendor = REG(PCIR_SUBVEND_2, 2);
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cfg->subdevice = REG(PCIR_SUBDEV_2, 2);
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cfg->nummaps = PCI_MAXMAPS_2;
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break;
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}
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#undef REG
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}
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|
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/* free pcicfgregs structure and all depending data structures */
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|
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static int
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cardbus_freecfg(struct cardbus_devinfo *dinfo)
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{
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free(dinfo, M_DEVBUF);
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return (0);
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|
}
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|
|
|
static void
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|
cardbus_print_verbose(struct cardbus_devinfo *dinfo)
|
|
{
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|
if (bootverbose) {
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pcicfgregs *cfg = &dinfo->cfg;
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|
|
printf("found->\tvendor=0x%04x, dev=0x%04x, revid=0x%02x\n",
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cfg->vendor, cfg->device, cfg->revid);
|
|
printf("\tclass=%02x-%02x-%02x, hdrtype=0x%02x, mfdev=%d\n",
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|
cfg->baseclass, cfg->subclass, cfg->progif,
|
|
cfg->hdrtype, cfg->mfdev);
|
|
#ifdef CARDBUS_DEBUG
|
|
printf("\tcmdreg=0x%04x, statreg=0x%04x, cachelnsz=%d (dwords)\n",
|
|
cfg->cmdreg, cfg->statreg, cfg->cachelnsz);
|
|
printf("\tlattimer=0x%02x (%d ns), mingnt=0x%02x (%d ns), maxlat=0x%02x (%d ns)\n",
|
|
cfg->lattimer, cfg->lattimer * 30,
|
|
cfg->mingnt, cfg->mingnt * 250, cfg->maxlat, cfg->maxlat * 250);
|
|
#endif /* CARDBUS_DEBUG */
|
|
if (cfg->intpin > 0)
|
|
printf("\tintpin=%c, irq=%d\n", cfg->intpin +'a' -1, cfg->intline);
|
|
}
|
|
}
|
|
|
|
/************************************************************************/
|
|
/* Resources */
|
|
/************************************************************************/
|
|
|
|
static int
|
|
cardbus_set_resource(device_t dev, device_t child, int type, int rid,
|
|
u_long start, u_long count)
|
|
{
|
|
struct cardbus_devinfo *dinfo = device_get_ivars(child);
|
|
struct resource_list *rl = &dinfo->resources;
|
|
resource_list_add(rl, type, rid, start, start + count - 1, count);
|
|
if (device_get_parent(child) == dev)
|
|
pci_write_config(child, rid, start, 4);
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
cardbus_get_resource(device_t dev, device_t child, int type, int rid,
|
|
u_long *startp, u_long *countp)
|
|
{
|
|
struct cardbus_devinfo *dinfo = device_get_ivars(child);
|
|
struct resource_list *rl = &dinfo->resources;
|
|
struct resource_list_entry *rle;
|
|
rle = resource_list_find(rl, type, rid);
|
|
if (!rle)
|
|
return ENOENT;
|
|
if (startp)
|
|
*startp = rle->start;
|
|
if (countp)
|
|
*countp = rle->count;
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
cardbus_delete_resource(device_t dev, device_t child, int type, int rid)
|
|
{
|
|
struct cardbus_devinfo *dinfo = device_get_ivars(child);
|
|
struct resource_list *rl = &dinfo->resources;
|
|
struct resource_list_entry *rle;
|
|
rle = resource_list_find(rl, type, rid);
|
|
if (rle) {
|
|
if (rle->res)
|
|
bus_generic_release_resource(dev, child, type, rid,
|
|
rle->res);
|
|
resource_list_delete(rl, type, rid);
|
|
}
|
|
if (device_get_parent(child) == dev)
|
|
pci_write_config(child, rid, 0, 4);
|
|
}
|
|
|
|
static int
|
|
cardbus_set_resource_method(device_t dev, device_t child, int type, int rid,
|
|
u_long start, u_long count)
|
|
{
|
|
int ret;
|
|
ret = cardbus_set_resource(dev, child, type, rid, start, count);
|
|
if (ret != 0) return ret;
|
|
return BUS_SET_RESOURCE(device_get_parent(dev), child, type, rid,
|
|
start, count);
|
|
}
|
|
|
|
static int
|
|
cardbus_get_resource_method(device_t dev, device_t child, int type, int rid,
|
|
u_long *startp, u_long *countp)
|
|
{
|
|
int ret;
|
|
ret = cardbus_get_resource(dev, child, type, rid, startp, countp);
|
|
if (ret != 0) return ret;
|
|
return BUS_GET_RESOURCE(device_get_parent(dev), child, type, rid,
|
|
startp, countp);
|
|
}
|
|
|
|
static void
|
|
cardbus_delete_resource_method(device_t dev, device_t child,
|
|
int type, int rid)
|
|
{
|
|
cardbus_delete_resource(dev, child, type, rid);
|
|
BUS_DELETE_RESOURCE(device_get_parent(dev), child, type, rid);
|
|
}
|
|
|
|
static int
|
|
cardbus_add_map(device_t cbdev, device_t dev, pcicfgregs *cfg, int reg)
|
|
{
|
|
struct cardbus_devinfo *dinfo = device_get_ivars(dev);
|
|
struct resource_list *rl = &dinfo->resources;
|
|
struct resource_list_entry *rle;
|
|
struct resource *res;
|
|
device_t bdev = device_get_parent(cbdev);
|
|
u_int32_t size;
|
|
u_int32_t testval;
|
|
int type;
|
|
|
|
if (reg == CARDBUS_ROM_REG)
|
|
testval = CARDBUS_ROM_ADDRMASK;
|
|
else
|
|
testval = ~0;
|
|
|
|
PCIB_WRITE_CONFIG(bdev, cfg->bus, cfg->slot, cfg->func,
|
|
reg, testval, 4);
|
|
|
|
testval = PCIB_READ_CONFIG(bdev, cfg->bus, cfg->slot, cfg->func,
|
|
reg, 4);
|
|
if (testval == ~0 || testval == 0)
|
|
return 0;
|
|
|
|
if ((testval&1) == 0)
|
|
type = SYS_RES_MEMORY;
|
|
else
|
|
type = SYS_RES_IOPORT;
|
|
|
|
size = CARDBUS_MAPREG_MEM_SIZE(testval);
|
|
res = bus_generic_alloc_resource(cbdev, dev, type, ®, 0, ~0, size,
|
|
rman_make_alignment_flags(size));
|
|
if (res) {
|
|
u_int32_t start = rman_get_start(res);
|
|
u_int32_t end = rman_get_end(res);
|
|
cardbus_set_resource(cbdev, dev, type, reg, start,end-start+1);
|
|
rle = resource_list_find(rl, type, reg);
|
|
rle->res = res;
|
|
} else {
|
|
device_printf(dev, "Unable to add map %02x\n", reg);
|
|
type = 0;
|
|
}
|
|
return type;
|
|
}
|
|
|
|
static void
|
|
cardbus_add_resources(device_t dev, pcicfgregs* cfg)
|
|
{
|
|
device_t cbdev = device_get_parent(dev);
|
|
device_t bdev = device_get_parent(cbdev);
|
|
struct cardbus_devinfo *dinfo = device_get_ivars(dev);
|
|
struct resource_list *rl = &dinfo->resources;
|
|
struct cardbus_quirk *q;
|
|
struct resource_list_entry *rle;
|
|
struct resource *res;
|
|
int rid;
|
|
u_int command;
|
|
int type;
|
|
int types;
|
|
int i;
|
|
|
|
types = 0;
|
|
for (i = 0; i < cfg->nummaps; i++) {
|
|
type = cardbus_add_map(cbdev, dev, cfg, PCIR_MAPS + i*4);
|
|
types |= 0x1 << type;
|
|
}
|
|
type = cardbus_add_map(cbdev, dev, cfg, CARDBUS_ROM_REG);
|
|
types |= 0x1 << type;
|
|
|
|
for (q = &cardbus_quirks[0]; q->devid; q++) {
|
|
if (q->devid == ((cfg->device << 16) | cfg->vendor)
|
|
&& q->type == CARDBUS_QUIRK_MAP_REG) {
|
|
type = cardbus_add_map(cbdev, dev, cfg, q->arg1);
|
|
types |= 0x1 << type;
|
|
}
|
|
}
|
|
|
|
command = PCIB_READ_CONFIG(bdev, cfg->bus, cfg->slot,
|
|
cfg->func, PCIR_COMMAND, 2);
|
|
if ((types & (0x1 << SYS_RES_MEMORY)) != 0)
|
|
command |= PCIM_CMD_MEMEN;
|
|
if ((types & (0x1 << SYS_RES_IOPORT)) != 0)
|
|
command |= PCIM_CMD_PORTEN;
|
|
command |= PCIM_CMD_BUSMASTEREN;
|
|
PCIB_WRITE_CONFIG(bdev, cfg->bus, cfg->slot, cfg->func,
|
|
PCIR_COMMAND, command, 2);
|
|
|
|
rid = 0;
|
|
res = bus_generic_alloc_resource(cbdev, dev, SYS_RES_IRQ,
|
|
&rid, 0, ~0, 1, RF_SHAREABLE);
|
|
|
|
if (res == NULL)
|
|
panic("Cannot allocate IRQ for card\n");
|
|
|
|
resource_list_add(rl, SYS_RES_IRQ, rid,
|
|
rman_get_start(res), rman_get_start(res), 1);
|
|
rle = resource_list_find(rl, SYS_RES_IRQ, rid);
|
|
rle->res = res;
|
|
}
|
|
|
|
static void
|
|
cardbus_release_all_resources(device_t dev, struct resource_list *rl)
|
|
{
|
|
struct resource_list_entry *rle;
|
|
|
|
SLIST_FOREACH(rle, rl, link) {
|
|
if (rle->res) {
|
|
bus_generic_release_resource(device_get_parent(dev),
|
|
dev, rle->type, rle->rid,
|
|
rle->res);
|
|
}
|
|
}
|
|
}
|
|
|
|
static struct resource*
|
|
cardbus_alloc_resource(device_t self, device_t child, int type,
|
|
int* rid, u_long start, u_long end,
|
|
u_long count, u_int flags)
|
|
{
|
|
struct cardbus_devinfo *dinfo = device_get_ivars(child);
|
|
struct resource_list *rl = &dinfo->resources;
|
|
struct resource_list_entry *rle = NULL;
|
|
struct resource *res;
|
|
|
|
if (device_get_parent(child) == self || child == self)
|
|
rle = resource_list_find(rl, type, *rid);
|
|
if (rle) {
|
|
if (flags & RF_ACTIVE) {
|
|
if (bus_activate_resource(child, rle->type, *rid,
|
|
rle->res)) {
|
|
return NULL;
|
|
}
|
|
if (*rid == CARDBUS_ROM_REG) {
|
|
uint32_t rom_reg;
|
|
|
|
rom_reg = pci_read_config(child, *rid, 4);
|
|
rom_reg |= CARDBUS_ROM_ENABLE;
|
|
pci_write_config(child, *rid, rom_reg, 4);
|
|
}
|
|
}
|
|
return rle->res; /* XXX: check if range within start/end */
|
|
} else {
|
|
res = bus_generic_alloc_resource(self, child, type, rid,
|
|
start, end, count, flags);
|
|
if (res) {
|
|
start = rman_get_start(res);
|
|
end = rman_get_end(res);
|
|
cardbus_set_resource(self, child, type, *rid, start,
|
|
end-start+1);
|
|
rle = resource_list_find(rl, type, *rid);
|
|
rle->res = res;
|
|
return res;
|
|
} else {
|
|
device_printf(self, "Resource Allocation Failed!\n");
|
|
return NULL;
|
|
}
|
|
}
|
|
}
|
|
|
|
static int
|
|
cardbus_release_resource(device_t dev, device_t child, int type, int rid,
|
|
struct resource *r)
|
|
{
|
|
/*
|
|
* According to the PCI 2.2 spec, devices may share an address
|
|
* decoder between memory mapped ROM access and memory
|
|
* mapped register access. To be safe, disable ROM access
|
|
* whenever it is released.
|
|
*/
|
|
if (rid == CARDBUS_ROM_REG) {
|
|
uint32_t rom_reg;
|
|
|
|
rom_reg = pci_read_config(child, rid, 4);
|
|
rom_reg &= ~CARDBUS_ROM_ENABLE;
|
|
pci_write_config(child, rid, rom_reg, 4);
|
|
}
|
|
|
|
return bus_deactivate_resource(child, type, rid, r);
|
|
}
|
|
|
|
/************************************************************************/
|
|
/* Other Bus Methods */
|
|
/************************************************************************/
|
|
|
|
static int
|
|
cardbus_print_resources(struct resource_list *rl, const char *name,
|
|
int type, const char *format)
|
|
{
|
|
struct resource_list_entry *rle;
|
|
int printed, retval;
|
|
|
|
printed = 0;
|
|
retval = 0;
|
|
/* Yes, this is kinda cheating */
|
|
SLIST_FOREACH(rle, rl, link) {
|
|
if (rle->type == type) {
|
|
if (printed == 0)
|
|
retval += printf(" %s ", name);
|
|
else if (printed > 0)
|
|
retval += printf(",");
|
|
printed++;
|
|
retval += printf(format, rle->start);
|
|
if (rle->count > 1) {
|
|
retval += printf("-");
|
|
retval += printf(format, rle->start +
|
|
rle->count - 1);
|
|
}
|
|
}
|
|
}
|
|
return retval;
|
|
}
|
|
|
|
static int
|
|
cardbus_print_child(device_t dev, device_t child)
|
|
{
|
|
struct cardbus_devinfo *dinfo;
|
|
struct resource_list *rl;
|
|
pcicfgregs *cfg;
|
|
int retval = 0;
|
|
|
|
dinfo = device_get_ivars(child);
|
|
cfg = &dinfo->cfg;
|
|
rl = &dinfo->resources;
|
|
|
|
retval += bus_print_child_header(dev, child);
|
|
|
|
retval += cardbus_print_resources(rl, "port", SYS_RES_IOPORT, "%#lx");
|
|
retval += cardbus_print_resources(rl, "mem", SYS_RES_MEMORY, "%#lx");
|
|
retval += cardbus_print_resources(rl, "irq", SYS_RES_IRQ, "%ld");
|
|
if (device_get_flags(dev))
|
|
retval += printf(" flags %#x", device_get_flags(dev));
|
|
|
|
retval += printf(" at device %d.%d", pci_get_slot(child),
|
|
pci_get_function(child));
|
|
|
|
retval += bus_print_child_footer(dev, child);
|
|
|
|
return (retval);
|
|
}
|
|
|
|
static void cardbus_probe_nomatch(device_t dev, device_t child) {
|
|
struct cardbus_devinfo *dinfo;
|
|
pcicfgregs *cfg;
|
|
|
|
dinfo = device_get_ivars(child);
|
|
cfg = &dinfo->cfg;
|
|
device_printf(dev, "<unknown card>");
|
|
printf(" (vendor=0x%04x, dev=0x%04x)", cfg->vendor, cfg->device);
|
|
printf(" at %d.%d", pci_get_slot(child), pci_get_function(child));
|
|
if (cfg->intpin > 0 && cfg->intline != 255) {
|
|
printf(" irq %d", cfg->intline);
|
|
}
|
|
printf("\n");
|
|
|
|
return;
|
|
}
|
|
|
|
static int
|
|
cardbus_read_ivar(device_t dev, device_t child, int which, u_long *result)
|
|
{
|
|
struct cardbus_devinfo *dinfo;
|
|
pcicfgregs *cfg;
|
|
|
|
dinfo = device_get_ivars(child);
|
|
cfg = &dinfo->cfg;
|
|
|
|
switch (which) {
|
|
case PCI_IVAR_SUBVENDOR:
|
|
*result = cfg->subvendor;
|
|
break;
|
|
case PCI_IVAR_SUBDEVICE:
|
|
*result = cfg->subdevice;
|
|
break;
|
|
case PCI_IVAR_VENDOR:
|
|
*result = cfg->vendor;
|
|
break;
|
|
case PCI_IVAR_DEVICE:
|
|
*result = cfg->device;
|
|
break;
|
|
case PCI_IVAR_DEVID:
|
|
*result = (cfg->device << 16) | cfg->vendor;
|
|
break;
|
|
case PCI_IVAR_CLASS:
|
|
*result = cfg->baseclass;
|
|
break;
|
|
case PCI_IVAR_SUBCLASS:
|
|
*result = cfg->subclass;
|
|
break;
|
|
case PCI_IVAR_PROGIF:
|
|
*result = cfg->progif;
|
|
break;
|
|
case PCI_IVAR_REVID:
|
|
*result = cfg->revid;
|
|
break;
|
|
case PCI_IVAR_INTPIN:
|
|
*result = cfg->intpin;
|
|
break;
|
|
case PCI_IVAR_IRQ:
|
|
*result = cfg->intline;
|
|
break;
|
|
case PCI_IVAR_BUS:
|
|
*result = cfg->bus;
|
|
break;
|
|
case PCI_IVAR_SLOT:
|
|
*result = cfg->slot;
|
|
break;
|
|
case PCI_IVAR_FUNCTION:
|
|
*result = cfg->func;
|
|
break;
|
|
default:
|
|
return ENOENT;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
cardbus_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
|
|
{
|
|
struct cardbus_devinfo *dinfo;
|
|
pcicfgregs *cfg;
|
|
|
|
dinfo = device_get_ivars(child);
|
|
cfg = &dinfo->cfg;
|
|
|
|
switch (which) {
|
|
case PCI_IVAR_SUBVENDOR:
|
|
case PCI_IVAR_SUBDEVICE:
|
|
case PCI_IVAR_VENDOR:
|
|
case PCI_IVAR_DEVICE:
|
|
case PCI_IVAR_DEVID:
|
|
case PCI_IVAR_CLASS:
|
|
case PCI_IVAR_SUBCLASS:
|
|
case PCI_IVAR_PROGIF:
|
|
case PCI_IVAR_REVID:
|
|
case PCI_IVAR_INTPIN:
|
|
case PCI_IVAR_IRQ:
|
|
case PCI_IVAR_BUS:
|
|
case PCI_IVAR_SLOT:
|
|
case PCI_IVAR_FUNCTION:
|
|
return EINVAL; /* disallow for now */
|
|
default:
|
|
return ENOENT;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/************************************************************************/
|
|
/* Compatibility with PCI bus (XXX: Do we need this?) */
|
|
/************************************************************************/
|
|
|
|
static u_int32_t
|
|
cardbus_read_config_method(device_t dev, device_t child, int reg, int width)
|
|
{
|
|
struct cardbus_devinfo *dinfo = device_get_ivars(child);
|
|
pcicfgregs *cfg = &dinfo->cfg;
|
|
|
|
return PCIB_READ_CONFIG(device_get_parent(dev),
|
|
cfg->bus, cfg->slot, cfg->func,
|
|
reg, width);
|
|
}
|
|
|
|
static void
|
|
cardbus_write_config_method(device_t dev, device_t child, int reg,
|
|
u_int32_t val, int width)
|
|
{
|
|
struct cardbus_devinfo *dinfo = device_get_ivars(child);
|
|
pcicfgregs *cfg = &dinfo->cfg;
|
|
|
|
PCIB_WRITE_CONFIG(device_get_parent(dev),
|
|
cfg->bus, cfg->slot, cfg->func,
|
|
reg, val, width);
|
|
}
|
|
|
|
static device_method_t cardbus_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, cardbus_probe),
|
|
DEVMETHOD(device_attach, cardbus_attach),
|
|
DEVMETHOD(device_detach, cardbus_detach),
|
|
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
|
DEVMETHOD(device_suspend, bus_generic_suspend),
|
|
DEVMETHOD(device_resume, bus_generic_resume),
|
|
|
|
/* Bus interface */
|
|
DEVMETHOD(bus_print_child, cardbus_print_child),
|
|
DEVMETHOD(bus_probe_nomatch, cardbus_probe_nomatch),
|
|
DEVMETHOD(bus_read_ivar, cardbus_read_ivar),
|
|
DEVMETHOD(bus_write_ivar, cardbus_write_ivar),
|
|
DEVMETHOD(bus_driver_added, cardbus_driver_added),
|
|
DEVMETHOD(bus_alloc_resource, cardbus_alloc_resource),
|
|
DEVMETHOD(bus_release_resource, cardbus_release_resource),
|
|
DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
|
|
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
|
|
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
|
|
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
|
|
DEVMETHOD(bus_driver_added, bus_generic_driver_added),
|
|
|
|
DEVMETHOD(bus_set_resource, cardbus_set_resource_method),
|
|
DEVMETHOD(bus_get_resource, cardbus_get_resource_method),
|
|
DEVMETHOD(bus_delete_resource, cardbus_delete_resource_method),
|
|
|
|
/* Card Interface */
|
|
DEVMETHOD(card_attach_card, cardbus_attach_card),
|
|
DEVMETHOD(card_detach_card, cardbus_detach_card),
|
|
DEVMETHOD(card_cis_read, cardbus_cis_read),
|
|
DEVMETHOD(card_cis_free, cardbus_cis_free),
|
|
|
|
/* Cardbus/PCI interface */
|
|
DEVMETHOD(pci_read_config, cardbus_read_config_method),
|
|
DEVMETHOD(pci_write_config, cardbus_write_config_method),
|
|
|
|
{0,0}
|
|
};
|
|
|
|
static driver_t cardbus_driver = {
|
|
"cardbus",
|
|
cardbus_methods,
|
|
0 /* no softc */
|
|
};
|
|
|
|
static devclass_t cardbus_devclass;
|
|
|
|
DRIVER_MODULE(cardbus, pccbb, cardbus_driver, cardbus_devclass, 0, 0);
|
|
/*
|
|
MODULE_DEPEND(cardbus, pccbb, 1, 1, 1);
|
|
*/
|