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9844b3b3ab
These realtek switch PHYs speak a variant of i2c with some slightly modified handling. From the submitter, slightly modified now that some further digging has been done: The I2C framework makes a assumption that the read/not-write bit of the first byte (the address) indicates whether reads or writes are to follow. The RTL8366 family uses the bus: after sending the address+read/not-write byte, two register address bytes are sent, then the 16-bit register value is sent or received. While the register write access can be performed as a 4-byte write, the read access requires the read bit to be set, but the first two bytes for the register address then need to be transmitted. This patch maintains the i2c protocol behaviour but allows it to be relaxed (for these kinds of switch PHYs, and whatever else Realtek may do with this almost-but-not-quite i2c bus) - by setting the "strict" hint to 0. The "strict" hint defaults to 1. Submitted by: Stefan Bethke <stb@lassitu.de>
411 lines
9.1 KiB
C
411 lines
9.1 KiB
C
/*-
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* Copyright (c) 1998 Nicolas Souchu
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/bus.h>
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#include <dev/iicbus/iiconf.h>
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#include <dev/iicbus/iicbus.h>
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#include "iicbus_if.h"
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/*
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* iicbus_intr()
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*/
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void
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iicbus_intr(device_t bus, int event, char *buf)
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{
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struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
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/* call owner's intr routine */
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if (sc->owner)
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IICBUS_INTR(sc->owner, event, buf);
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return;
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}
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static int
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iicbus_poll(struct iicbus_softc *sc, int how)
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{
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int error;
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IICBUS_ASSERT_LOCKED(sc);
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switch (how) {
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case IIC_WAIT | IIC_INTR:
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error = mtx_sleep(sc, &sc->lock, IICPRI|PCATCH, "iicreq", 0);
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break;
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case IIC_WAIT | IIC_NOINTR:
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error = mtx_sleep(sc, &sc->lock, IICPRI, "iicreq", 0);
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break;
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default:
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return (EWOULDBLOCK);
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break;
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}
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return (error);
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}
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/*
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* iicbus_request_bus()
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*
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* Allocate the device to perform transfers.
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*
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* how : IIC_WAIT or IIC_DONTWAIT
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*/
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int
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iicbus_request_bus(device_t bus, device_t dev, int how)
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{
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struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
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int error = 0;
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/* first, ask the underlying layers if the request is ok */
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IICBUS_LOCK(sc);
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do {
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error = IICBUS_CALLBACK(device_get_parent(bus),
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IIC_REQUEST_BUS, (caddr_t)&how);
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if (error)
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error = iicbus_poll(sc, how);
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} while (error == EWOULDBLOCK);
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while (!error) {
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if (sc->owner && sc->owner != dev) {
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error = iicbus_poll(sc, how);
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} else {
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sc->owner = dev;
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IICBUS_UNLOCK(sc);
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return (0);
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}
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/* free any allocated resource */
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if (error)
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IICBUS_CALLBACK(device_get_parent(bus), IIC_RELEASE_BUS,
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(caddr_t)&how);
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}
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IICBUS_UNLOCK(sc);
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return (error);
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}
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/*
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* iicbus_release_bus()
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*
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* Release the device allocated with iicbus_request_dev()
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*/
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int
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iicbus_release_bus(device_t bus, device_t dev)
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{
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struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
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int error;
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/* first, ask the underlying layers if the release is ok */
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error = IICBUS_CALLBACK(device_get_parent(bus), IIC_RELEASE_BUS, NULL);
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if (error)
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return (error);
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IICBUS_LOCK(sc);
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if (sc->owner != dev) {
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IICBUS_UNLOCK(sc);
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return (EACCES);
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}
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sc->owner = NULL;
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/* wakeup waiting processes */
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wakeup(sc);
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IICBUS_UNLOCK(sc);
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return (0);
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}
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/*
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* iicbus_started()
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*
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* Test if the iicbus is started by the controller
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*/
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int
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iicbus_started(device_t bus)
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{
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struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
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return (sc->started);
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}
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/*
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* iicbus_start()
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*
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* Send start condition to the slave addressed by 'slave'
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*/
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int
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iicbus_start(device_t bus, u_char slave, int timeout)
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{
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struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
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int error = 0;
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if (sc->started)
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return (EINVAL); /* bus already started */
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if (!(error = IICBUS_START(device_get_parent(bus), slave, timeout)))
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sc->started = slave;
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else
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sc->started = 0;
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return (error);
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}
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/*
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* iicbus_repeated_start()
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*
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* Send start condition to the slave addressed by 'slave'
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*/
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int
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iicbus_repeated_start(device_t bus, u_char slave, int timeout)
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{
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struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
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int error = 0;
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if (!sc->started)
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return (EINVAL); /* bus should have been already started */
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if (!(error = IICBUS_REPEATED_START(device_get_parent(bus), slave, timeout)))
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sc->started = slave;
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else
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sc->started = 0;
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return (error);
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}
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/*
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* iicbus_stop()
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*
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* Send stop condition to the bus
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*/
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int
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iicbus_stop(device_t bus)
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{
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struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
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int error = 0;
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if (!sc->started)
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return (EINVAL); /* bus not started */
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error = IICBUS_STOP(device_get_parent(bus));
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/* refuse any further access */
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sc->started = 0;
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return (error);
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}
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/*
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* iicbus_write()
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*
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* Write a block of data to the slave previously started by
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* iicbus_start() call
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*/
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int
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iicbus_write(device_t bus, const char *buf, int len, int *sent, int timeout)
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{
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struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
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/* a slave must have been started for writing */
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if (sc->started == 0 || (sc->strict != 0 && (sc->started & LSB) != 0))
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return (EINVAL);
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return (IICBUS_WRITE(device_get_parent(bus), buf, len, sent, timeout));
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}
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/*
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* iicbus_read()
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*
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* Read a block of data from the slave previously started by
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* iicbus_read() call
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*/
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int
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iicbus_read(device_t bus, char *buf, int len, int *read, int last, int delay)
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{
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struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
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/* a slave must have been started for reading */
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if (sc->started == 0 || (sc->strict != 0 && (sc->started & LSB) == 0))
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return (EINVAL);
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return (IICBUS_READ(device_get_parent(bus), buf, len, read, last, delay));
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}
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/*
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* iicbus_write_byte()
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*
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* Write a byte to the slave previously started by iicbus_start() call
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*/
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int
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iicbus_write_byte(device_t bus, char byte, int timeout)
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{
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char data = byte;
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int sent;
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return (iicbus_write(bus, &data, 1, &sent, timeout));
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}
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/*
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* iicbus_read_byte()
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*
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* Read a byte from the slave previously started by iicbus_start() call
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*/
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int
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iicbus_read_byte(device_t bus, char *byte, int timeout)
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{
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int read;
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return (iicbus_read(bus, byte, 1, &read, IIC_LAST_READ, timeout));
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}
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/*
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* iicbus_block_write()
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*
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* Write a block of data to slave ; start/stop protocol managed
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*/
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int
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iicbus_block_write(device_t bus, u_char slave, char *buf, int len, int *sent)
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{
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u_char addr = slave & ~LSB;
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int error;
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if ((error = iicbus_start(bus, addr, 0)))
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return (error);
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error = iicbus_write(bus, buf, len, sent, 0);
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iicbus_stop(bus);
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return (error);
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}
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/*
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* iicbus_block_read()
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*
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* Read a block of data from slave ; start/stop protocol managed
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*/
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int
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iicbus_block_read(device_t bus, u_char slave, char *buf, int len, int *read)
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{
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u_char addr = slave | LSB;
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int error;
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if ((error = iicbus_start(bus, addr, 0)))
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return (error);
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error = iicbus_read(bus, buf, len, read, IIC_LAST_READ, 0);
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iicbus_stop(bus);
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return (error);
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}
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/*
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* iicbus_transfer()
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*
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* Do an aribtrary number of transfers on the iicbus. We pass these
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* raw requests to the bridge driver. If the bridge driver supports
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* them directly, then it manages all the details. If not, it can use
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* the helper function iicbus_transfer_gen() which will do the
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* transfers at a low level.
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*
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* Pointers passed in as part of iic_msg must be kernel pointers.
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* Callers that have user addresses to manage must do so on their own.
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*/
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int
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iicbus_transfer(device_t bus, struct iic_msg *msgs, uint32_t nmsgs)
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{
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return (IICBUS_TRANSFER(device_get_parent(bus), msgs, nmsgs));
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}
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/*
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* Generic version of iicbus_transfer that calls the appropriate
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* routines to accomplish this. See note above about acceptable
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* buffer addresses.
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*/
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int
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iicbus_transfer_gen(device_t dev, struct iic_msg *msgs, uint32_t nmsgs)
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{
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int i, error, lenread, lenwrote, nkid, rpstart, addr;
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device_t *children, bus;
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if ((error = device_get_children(dev, &children, &nkid)) != 0)
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return (error);
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if (nkid != 1) {
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free(children, M_TEMP);
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return (EIO);
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}
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bus = children[0];
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rpstart = 0;
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free(children, M_TEMP);
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for (i = 0, error = 0; i < nmsgs && error == 0; i++) {
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addr = msgs[i].slave;
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if (msgs[i].flags & IIC_M_RD)
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addr |= LSB;
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else
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addr &= ~LSB;
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if (!(msgs[i].flags & IIC_M_NOSTART)) {
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if (rpstart)
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error = iicbus_repeated_start(bus, addr, 0);
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else
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error = iicbus_start(bus, addr, 0);
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}
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if (error)
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break;
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if (msgs[i].flags & IIC_M_RD)
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error = iicbus_read(bus, msgs[i].buf, msgs[i].len,
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&lenread, IIC_LAST_READ, 0);
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else
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error = iicbus_write(bus, msgs[i].buf, msgs[i].len,
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&lenwrote, 0);
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if (!(msgs[i].flags & IIC_M_NOSTOP)) {
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rpstart = 0;
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iicbus_stop(bus);
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} else {
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rpstart = 1; /* Next message gets repeated start */
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}
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}
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return (error);
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}
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