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then invoke the children. As the value of HISR can be read only once, pass the HISR to the children via struct csa_bridgeinfo, stored in the ivars of them. - Clear the contents of serial FIFO upon stopping the DMA for playing. This may eliminate buzz on playing. Experimental.
837 lines
21 KiB
C
837 lines
21 KiB
C
/*
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* Copyright (c) 1999 Seigo Tanimura
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* All rights reserved.
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*
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* Portions of this source are based on cwcealdr.cpp and dhwiface.cpp in
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* cwcealdr1.zip, the sample sources by Crystal Semiconductor.
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* Copyright (c) 1996-1998 Crystal Semiconductor Corp.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/soundcard.h>
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#include <dev/sound/pcm/sound.h>
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#include <dev/sound/pcm/ac97.h>
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#include <dev/sound/chip.h>
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#include <dev/sound/pci/csareg.h>
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#include <dev/sound/pci/csavar.h>
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#include <pci/pcireg.h>
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#include <pci/pcivar.h>
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/* device private data */
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struct csa_info;
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struct csa_chinfo {
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struct csa_info *parent;
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pcm_channel *channel;
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snd_dbuf *buffer;
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int dir;
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u_int32_t fmt;
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};
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struct csa_info {
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csa_res res; /* resource */
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void *ih; /* Interrupt cookie */
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bus_dma_tag_t parent_dmat; /* DMA tag */
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struct csa_bridgeinfo *binfo; /* The state of the parent. */
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/* Contents of board's registers */
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u_long pfie;
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u_long pctl;
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u_long cctl;
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struct csa_chinfo pch, rch;
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};
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/* -------------------------------------------------------------------- */
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/* prototypes */
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static int csa_init(struct csa_info *);
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static void csa_intr(void *);
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static void csa_setplaysamplerate(csa_res *resp, u_long ulInRate);
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static void csa_setcapturesamplerate(csa_res *resp, u_long ulOutRate);
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static void csa_startplaydma(struct csa_info *csa);
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static void csa_startcapturedma(struct csa_info *csa);
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static void csa_stopplaydma(struct csa_info *csa);
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static void csa_stopcapturedma(struct csa_info *csa);
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static void csa_powerupadc(csa_res *resp);
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static void csa_powerupdac(csa_res *resp);
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static int csa_startdsp(csa_res *resp);
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static int csa_allocres(struct csa_info *scp, device_t dev);
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static void csa_releaseres(struct csa_info *scp, device_t dev);
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/* talk to the codec - called from ac97.c */
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static u_int32_t csa_rdcd(void *, int);
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static void csa_wrcd(void *, int, u_int32_t);
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/* channel interface */
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static void *csachan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir);
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static int csachan_setdir(void *data, int dir);
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static int csachan_setformat(void *data, u_int32_t format);
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static int csachan_setspeed(void *data, u_int32_t speed);
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static int csachan_setblocksize(void *data, u_int32_t blocksize);
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static int csachan_trigger(void *data, int go);
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static int csachan_getptr(void *data);
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static pcmchan_caps *csachan_getcaps(void *data);
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static pcmchan_caps csa_playcaps = {
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8000, 48000,
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AFMT_STEREO | AFMT_U8 | AFMT_S8 | AFMT_S16_LE | AFMT_S16_BE,
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AFMT_STEREO | AFMT_S16_LE
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};
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static pcmchan_caps csa_reccaps = {
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11025, 48000,
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AFMT_STEREO | AFMT_S16_LE,
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AFMT_STEREO | AFMT_S16_LE
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};
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static pcm_channel csa_chantemplate = {
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csachan_init,
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csachan_setdir,
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csachan_setformat,
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csachan_setspeed,
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csachan_setblocksize,
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csachan_trigger,
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csachan_getptr,
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csachan_getcaps,
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};
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/* -------------------------------------------------------------------- */
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/* channel interface */
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static void *
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csachan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir)
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{
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struct csa_info *csa = devinfo;
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struct csa_chinfo *ch = (dir == PCMDIR_PLAY)? &csa->pch : &csa->rch;
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ch->parent = csa;
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ch->channel = c;
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ch->buffer = b;
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ch->buffer->bufsize = CS461x_BUFFSIZE;
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if (chn_allocbuf(ch->buffer, csa->parent_dmat) == -1) return NULL;
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return ch;
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}
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static int
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csachan_setdir(void *data, int dir)
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{
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struct csa_chinfo *ch = data;
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struct csa_info *csa = ch->parent;
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csa_res *resp;
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resp = &csa->res;
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if (dir == PCMDIR_PLAY)
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csa_writemem(resp, BA1_PBA, vtophys(ch->buffer->buf));
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else
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csa_writemem(resp, BA1_CBA, vtophys(ch->buffer->buf));
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ch->dir = dir;
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return 0;
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}
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static int
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csachan_setformat(void *data, u_int32_t format)
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{
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struct csa_chinfo *ch = data;
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struct csa_info *csa = ch->parent;
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u_long pdtc;
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csa_res *resp;
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resp = &csa->res;
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if (ch->dir == PCMDIR_REC)
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csa_writemem(resp, BA1_CIE, (csa_readmem(resp, BA1_CIE) & ~0x0000003f) | 0x00000001);
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else {
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csa->pfie = csa_readmem(resp, BA1_PFIE) & ~0x0000f03f;
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if (format & AFMT_U8 || format & AFMT_U16_LE || format & AFMT_U16_BE)
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csa->pfie |= 0x8000;
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if (format & AFMT_S16_BE || format & AFMT_U16_BE)
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csa->pfie |= 0x4000;
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if (!(format & AFMT_STEREO))
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csa->pfie |= 0x2000;
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if (format & AFMT_U8 || format & AFMT_S8)
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csa->pfie |= 0x1000;
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csa_writemem(resp, BA1_PFIE, csa->pfie);
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pdtc = csa_readmem(resp, BA1_PDTC) & ~0x000003ff;
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if ((format & AFMT_S16_BE || format & AFMT_U16_BE || format & AFMT_S16_LE || format & AFMT_U16_LE) && (format & AFMT_STEREO))
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pdtc |= 0x00f;
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else if ((format & AFMT_S16_BE || format & AFMT_U16_BE || format & AFMT_S16_LE || format & AFMT_U16_LE) || (format & AFMT_STEREO))
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pdtc |= 0x007;
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else
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pdtc |= 0x003;
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csa_writemem(resp, BA1_PDTC, pdtc);
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}
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ch->fmt = format;
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return 0;
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}
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static int
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csachan_setspeed(void *data, u_int32_t speed)
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{
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struct csa_chinfo *ch = data;
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struct csa_info *csa = ch->parent;
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csa_res *resp;
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resp = &csa->res;
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if (ch->dir == PCMDIR_PLAY)
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csa_setplaysamplerate(resp, speed);
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else if (ch->dir == PCMDIR_REC)
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csa_setcapturesamplerate(resp, speed);
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/* rec/play speeds locked together - should indicate in flags */
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#if 0
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if (ch->direction == PCMDIR_PLAY) d->rec[0].speed = speed;
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else d->play[0].speed = speed;
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#endif
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return speed; /* XXX calc real speed */
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}
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static void
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csa_setplaysamplerate(csa_res *resp, u_long ulInRate)
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{
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u_long ulTemp1, ulTemp2;
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u_long ulPhiIncr;
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u_long ulCorrectionPerGOF, ulCorrectionPerSec;
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u_long ulOutRate;
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ulOutRate = 48000;
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/*
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* Compute the values used to drive the actual sample rate conversion.
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* The following formulas are being computed, using inline assembly
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* since we need to use 64 bit arithmetic to compute the values:
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*
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* ulPhiIncr = floor((Fs,in * 2^26) / Fs,out)
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* ulCorrectionPerGOF = floor((Fs,in * 2^26 - Fs,out * ulPhiIncr) /
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* GOF_PER_SEC)
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* ulCorrectionPerSec = Fs,in * 2^26 - Fs,out * phiIncr -
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* GOF_PER_SEC * ulCorrectionPerGOF
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*
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* i.e.
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*
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* ulPhiIncr:ulOther = dividend:remainder((Fs,in * 2^26) / Fs,out)
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* ulCorrectionPerGOF:ulCorrectionPerSec =
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* dividend:remainder(ulOther / GOF_PER_SEC)
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*/
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ulTemp1 = ulInRate << 16;
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ulPhiIncr = ulTemp1 / ulOutRate;
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ulTemp1 -= ulPhiIncr * ulOutRate;
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ulTemp1 <<= 10;
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ulPhiIncr <<= 10;
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ulTemp2 = ulTemp1 / ulOutRate;
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ulPhiIncr += ulTemp2;
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ulTemp1 -= ulTemp2 * ulOutRate;
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ulCorrectionPerGOF = ulTemp1 / GOF_PER_SEC;
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ulTemp1 -= ulCorrectionPerGOF * GOF_PER_SEC;
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ulCorrectionPerSec = ulTemp1;
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/*
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* Fill in the SampleRateConverter control block.
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*/
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csa_writemem(resp, BA1_PSRC, ((ulCorrectionPerSec << 16) & 0xFFFF0000) | (ulCorrectionPerGOF & 0xFFFF));
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csa_writemem(resp, BA1_PPI, ulPhiIncr);
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}
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static void
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csa_setcapturesamplerate(csa_res *resp, u_long ulOutRate)
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{
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u_long ulPhiIncr, ulCoeffIncr, ulTemp1, ulTemp2;
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u_long ulCorrectionPerGOF, ulCorrectionPerSec, ulInitialDelay;
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u_long dwFrameGroupLength, dwCnt;
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u_long ulInRate;
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ulInRate = 48000;
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/*
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* We can only decimate by up to a factor of 1/9th the hardware rate.
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* Return an error if an attempt is made to stray outside that limit.
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*/
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if((ulOutRate * 9) < ulInRate)
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return;
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/*
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* We can not capture at at rate greater than the Input Rate (48000).
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* Return an error if an attempt is made to stray outside that limit.
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*/
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if(ulOutRate > ulInRate)
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return;
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/*
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* Compute the values used to drive the actual sample rate conversion.
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* The following formulas are being computed, using inline assembly
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* since we need to use 64 bit arithmetic to compute the values:
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*
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* ulCoeffIncr = -floor((Fs,out * 2^23) / Fs,in)
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* ulPhiIncr = floor((Fs,in * 2^26) / Fs,out)
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* ulCorrectionPerGOF = floor((Fs,in * 2^26 - Fs,out * ulPhiIncr) /
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* GOF_PER_SEC)
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* ulCorrectionPerSec = Fs,in * 2^26 - Fs,out * phiIncr -
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* GOF_PER_SEC * ulCorrectionPerGOF
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* ulInitialDelay = ceil((24 * Fs,in) / Fs,out)
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*
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* i.e.
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*
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* ulCoeffIncr = neg(dividend((Fs,out * 2^23) / Fs,in))
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* ulPhiIncr:ulOther = dividend:remainder((Fs,in * 2^26) / Fs,out)
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* ulCorrectionPerGOF:ulCorrectionPerSec =
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* dividend:remainder(ulOther / GOF_PER_SEC)
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* ulInitialDelay = dividend(((24 * Fs,in) + Fs,out - 1) / Fs,out)
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*/
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ulTemp1 = ulOutRate << 16;
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ulCoeffIncr = ulTemp1 / ulInRate;
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ulTemp1 -= ulCoeffIncr * ulInRate;
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ulTemp1 <<= 7;
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ulCoeffIncr <<= 7;
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ulCoeffIncr += ulTemp1 / ulInRate;
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ulCoeffIncr ^= 0xFFFFFFFF;
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ulCoeffIncr++;
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ulTemp1 = ulInRate << 16;
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ulPhiIncr = ulTemp1 / ulOutRate;
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ulTemp1 -= ulPhiIncr * ulOutRate;
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ulTemp1 <<= 10;
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ulPhiIncr <<= 10;
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ulTemp2 = ulTemp1 / ulOutRate;
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ulPhiIncr += ulTemp2;
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ulTemp1 -= ulTemp2 * ulOutRate;
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ulCorrectionPerGOF = ulTemp1 / GOF_PER_SEC;
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ulTemp1 -= ulCorrectionPerGOF * GOF_PER_SEC;
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ulCorrectionPerSec = ulTemp1;
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ulInitialDelay = ((ulInRate * 24) + ulOutRate - 1) / ulOutRate;
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/*
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* Fill in the VariDecimate control block.
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*/
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csa_writemem(resp, BA1_CSRC,
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((ulCorrectionPerSec << 16) & 0xFFFF0000) | (ulCorrectionPerGOF & 0xFFFF));
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csa_writemem(resp, BA1_CCI, ulCoeffIncr);
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csa_writemem(resp, BA1_CD,
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(((BA1_VARIDEC_BUF_1 + (ulInitialDelay << 2)) << 16) & 0xFFFF0000) | 0x80);
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csa_writemem(resp, BA1_CPI, ulPhiIncr);
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/*
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* Figure out the frame group length for the write back task. Basically,
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* this is just the factors of 24000 (2^6*3*5^3) that are not present in
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* the output sample rate.
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*/
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dwFrameGroupLength = 1;
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for(dwCnt = 2; dwCnt <= 64; dwCnt *= 2)
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{
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if(((ulOutRate / dwCnt) * dwCnt) !=
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ulOutRate)
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{
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dwFrameGroupLength *= 2;
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}
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}
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if(((ulOutRate / 3) * 3) !=
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ulOutRate)
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{
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dwFrameGroupLength *= 3;
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}
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for(dwCnt = 5; dwCnt <= 125; dwCnt *= 5)
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{
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if(((ulOutRate / dwCnt) * dwCnt) !=
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ulOutRate)
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{
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dwFrameGroupLength *= 5;
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}
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}
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/*
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* Fill in the WriteBack control block.
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*/
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csa_writemem(resp, BA1_CFG1, dwFrameGroupLength);
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csa_writemem(resp, BA1_CFG2, (0x00800000 | dwFrameGroupLength));
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csa_writemem(resp, BA1_CCST, 0x0000FFFF);
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csa_writemem(resp, BA1_CSPB, ((65536 * ulOutRate) / 24000));
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csa_writemem(resp, (BA1_CSPB + 4), 0x0000FFFF);
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}
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|
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static int
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csachan_setblocksize(void *data, u_int32_t blocksize)
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{
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#if notdef
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return blocksize;
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#else
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struct csa_chinfo *ch = data;
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return ch->buffer->bufsize / 2;
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#endif /* notdef */
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}
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|
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static int
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csachan_trigger(void *data, int go)
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{
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struct csa_chinfo *ch = data;
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struct csa_info *csa = ch->parent;
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if (go == PCMTRIG_EMLDMAWR) return 0;
|
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if (ch->dir == PCMDIR_PLAY) {
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if (go == PCMTRIG_START)
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csa_startplaydma(csa);
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else
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csa_stopplaydma(csa);
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} else {
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if (go == PCMTRIG_START)
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csa_startcapturedma(csa);
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else
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csa_stopcapturedma(csa);
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}
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return 0;
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}
|
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|
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static void
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csa_startplaydma(struct csa_info *csa)
|
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{
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csa_res *resp;
|
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u_long ul;
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|
|
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resp = &csa->res;
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ul = csa_readmem(resp, BA1_PCTL);
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ul &= 0x0000ffff;
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csa_writemem(resp, BA1_PCTL, ul | csa->pctl);
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csa_writemem(resp, BA1_PVOL, 0x80008000);
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}
|
|
|
|
static void
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csa_startcapturedma(struct csa_info *csa)
|
|
{
|
|
csa_res *resp;
|
|
u_long ul;
|
|
|
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resp = &csa->res;
|
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ul = csa_readmem(resp, BA1_CCTL);
|
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ul &= 0xffff0000;
|
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csa_writemem(resp, BA1_CCTL, ul | csa->cctl);
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csa_writemem(resp, BA1_CVOL, 0x80008000);
|
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}
|
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|
|
static void
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csa_stopplaydma(struct csa_info *csa)
|
|
{
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csa_res *resp;
|
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u_long ul;
|
|
|
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resp = &csa->res;
|
|
ul = csa_readmem(resp, BA1_PCTL);
|
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csa->pctl = ul & 0xffff0000;
|
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csa_writemem(resp, BA1_PCTL, ul & 0x0000ffff);
|
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csa_writemem(resp, BA1_PVOL, 0xffffffff);
|
|
|
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/* Clear the serial fifos. */
|
|
csa_clearserialfifos(resp);
|
|
}
|
|
|
|
static void
|
|
csa_stopcapturedma(struct csa_info *csa)
|
|
{
|
|
csa_res *resp;
|
|
u_long ul;
|
|
|
|
resp = &csa->res;
|
|
ul = csa_readmem(resp, BA1_CCTL);
|
|
csa->cctl = ul & 0x0000ffff;
|
|
csa_writemem(resp, BA1_CCTL, ul & 0xffff0000);
|
|
csa_writemem(resp, BA1_CVOL, 0xffffffff);
|
|
}
|
|
|
|
static void
|
|
csa_powerupdac(csa_res *resp)
|
|
{
|
|
int i;
|
|
u_long ul;
|
|
|
|
/*
|
|
* Power on the DACs on the AC97 codec. We turn off the DAC
|
|
* powerdown bit and write the new value of the power control
|
|
* register.
|
|
*/
|
|
ul = csa_readio(resp, BA0_AC97_POWERDOWN);
|
|
ul &= 0xfdff;
|
|
csa_writeio(resp, BA0_AC97_POWERDOWN, ul);
|
|
|
|
/*
|
|
* Now, we wait until we sample a DAC ready state.
|
|
*/
|
|
for (i = 0 ; i < 32 ; i++) {
|
|
/*
|
|
* First, lets wait a short while to let things settle out a
|
|
* bit, and to prevent retrying the read too quickly.
|
|
*/
|
|
DELAY(125);
|
|
|
|
/*
|
|
* Read the current state of the power control register.
|
|
*/
|
|
ul = csa_readio(resp, BA0_AC97_POWERDOWN);
|
|
|
|
/*
|
|
* If the DAC ready state bit is set, then stop waiting.
|
|
*/
|
|
if ((ul & 0x2) != 0)
|
|
break;
|
|
}
|
|
/*
|
|
* The DACs are now calibrated, so we can unmute the DAC output.
|
|
*/
|
|
csa_writeio(resp, BA0_AC97_PCM_OUT_VOLUME, 0x0808);
|
|
}
|
|
|
|
static void
|
|
csa_powerupadc(csa_res *resp)
|
|
{
|
|
int i;
|
|
u_long ul;
|
|
|
|
/*
|
|
* Power on the ADCs on the AC97 codec. We turn off the ADC
|
|
* powerdown bit and write the new value of the power control
|
|
* register.
|
|
*/
|
|
ul = csa_readio(resp, BA0_AC97_POWERDOWN);
|
|
ul &= 0xfeff;
|
|
csa_writeio(resp, BA0_AC97_POWERDOWN, ul);
|
|
|
|
/*
|
|
* Now, we wait until we sample a ADC ready state.
|
|
*/
|
|
for (i = 0 ; i < 32 ; i++) {
|
|
/*
|
|
* First, lets wait a short while to let things settle out a
|
|
* bit, and to prevent retrying the read too quickly.
|
|
*/
|
|
DELAY(125);
|
|
|
|
/*
|
|
* Read the current state of the power control register.
|
|
*/
|
|
ul = csa_readio(resp, BA0_AC97_POWERDOWN);
|
|
|
|
/*
|
|
* If the ADC ready state bit is set, then stop waiting.
|
|
*/
|
|
if ((ul & 0x1) != 0)
|
|
break;
|
|
}
|
|
}
|
|
|
|
static int
|
|
csa_startdsp(csa_res *resp)
|
|
{
|
|
int i;
|
|
u_long ul;
|
|
|
|
/*
|
|
* Set the frame timer to reflect the number of cycles per frame.
|
|
*/
|
|
csa_writemem(resp, BA1_FRMT, 0xadf);
|
|
|
|
/*
|
|
* Turn on the run, run at frame, and DMA enable bits in the local copy of
|
|
* the SP control register.
|
|
*/
|
|
csa_writemem(resp, BA1_SPCR, SPCR_RUN | SPCR_RUNFR | SPCR_DRQEN);
|
|
|
|
/*
|
|
* Wait until the run at frame bit resets itself in the SP control
|
|
* register.
|
|
*/
|
|
ul = 0;
|
|
for (i = 0 ; i < 25 ; i++) {
|
|
/*
|
|
* Wait a little bit, so we don't issue PCI reads too frequently.
|
|
*/
|
|
#if notdef
|
|
DELAY(1000);
|
|
#else
|
|
DELAY(125);
|
|
#endif /* notdef */
|
|
/*
|
|
* Fetch the current value of the SP status register.
|
|
*/
|
|
ul = csa_readmem(resp, BA1_SPCR);
|
|
|
|
/*
|
|
* If the run at frame bit has reset, then stop waiting.
|
|
*/
|
|
if((ul & SPCR_RUNFR) == 0)
|
|
break;
|
|
}
|
|
/*
|
|
* If the run at frame bit never reset, then return an error.
|
|
*/
|
|
if((ul & SPCR_RUNFR) != 0)
|
|
return (EAGAIN);
|
|
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
csachan_getptr(void *data)
|
|
{
|
|
struct csa_chinfo *ch = data;
|
|
struct csa_info *csa = ch->parent;
|
|
csa_res *resp;
|
|
int ptr;
|
|
|
|
resp = &csa->res;
|
|
|
|
if (ch->dir == PCMDIR_PLAY) {
|
|
ptr = csa_readmem(resp, BA1_PBA) - vtophys(ch->buffer->buf);
|
|
if ((ch->fmt & AFMT_U8) != 0 || (ch->fmt & AFMT_S8) != 0)
|
|
ptr >>= 1;
|
|
} else {
|
|
ptr = csa_readmem(resp, BA1_CBA) - vtophys(ch->buffer->buf);
|
|
if ((ch->fmt & AFMT_U8) != 0 || (ch->fmt & AFMT_S8) != 0)
|
|
ptr >>= 1;
|
|
}
|
|
|
|
return (ptr);
|
|
}
|
|
|
|
static pcmchan_caps *
|
|
csachan_getcaps(void *data)
|
|
{
|
|
struct csa_chinfo *ch = data;
|
|
return (ch->dir == PCMDIR_PLAY)? &csa_playcaps : &csa_reccaps;
|
|
}
|
|
|
|
/* The interrupt handler */
|
|
static void
|
|
csa_intr (void *p)
|
|
{
|
|
struct csa_info *csa = p;
|
|
|
|
if ((csa->binfo->hisr & HISR_VC0) != 0)
|
|
chn_intr(csa->pch.channel);
|
|
if ((csa->binfo->hisr & HISR_VC1) != 0)
|
|
chn_intr(csa->rch.channel);
|
|
}
|
|
|
|
/* -------------------------------------------------------------------- */
|
|
|
|
/*
|
|
* Probe and attach the card
|
|
*/
|
|
|
|
static int
|
|
csa_init(struct csa_info *csa)
|
|
{
|
|
csa_res *resp;
|
|
|
|
resp = &csa->res;
|
|
|
|
csa->pfie = 0;
|
|
csa_stopplaydma(csa);
|
|
csa_stopcapturedma(csa);
|
|
|
|
/* Crank up the power on the DAC and ADC. */
|
|
csa_powerupadc(resp);
|
|
csa_powerupdac(resp);
|
|
|
|
csa_setplaysamplerate(resp, 8000);
|
|
csa_setcapturesamplerate(resp, 8000);
|
|
|
|
if (csa_startdsp(resp))
|
|
return (1);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Allocates resources. */
|
|
static int
|
|
csa_allocres(struct csa_info *csa, device_t dev)
|
|
{
|
|
csa_res *resp;
|
|
|
|
resp = &csa->res;
|
|
if (resp->io == NULL) {
|
|
resp->io = bus_alloc_resource(dev, SYS_RES_MEMORY, &resp->io_rid, 0, ~0, CS461x_IO_SIZE, RF_ACTIVE);
|
|
if (resp->io == NULL)
|
|
return (1);
|
|
}
|
|
if (resp->mem == NULL) {
|
|
resp->mem = bus_alloc_resource(dev, SYS_RES_MEMORY, &resp->mem_rid, 0, ~0, CS461x_MEM_SIZE, RF_ACTIVE);
|
|
if (resp->mem == NULL)
|
|
return (1);
|
|
}
|
|
if (resp->irq == NULL) {
|
|
resp->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &resp->irq_rid, 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
|
|
if (resp->irq == NULL)
|
|
return (1);
|
|
}
|
|
if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/CS461x_BUFFSIZE, /*boundary*/CS461x_BUFFSIZE,
|
|
/*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
|
|
/*highaddr*/BUS_SPACE_MAXADDR,
|
|
/*filter*/NULL, /*filterarg*/NULL,
|
|
/*maxsize*/CS461x_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff,
|
|
/*flags*/0, &csa->parent_dmat) != 0)
|
|
return (1);
|
|
|
|
return (0);
|
|
}
|
|
|
|
/* Releases resources. */
|
|
static void
|
|
csa_releaseres(struct csa_info *csa, device_t dev)
|
|
{
|
|
csa_res *resp;
|
|
|
|
resp = &csa->res;
|
|
if (resp->irq != NULL) {
|
|
bus_release_resource(dev, SYS_RES_IRQ, resp->irq_rid, resp->irq);
|
|
resp->irq = NULL;
|
|
}
|
|
if (resp->io != NULL) {
|
|
bus_release_resource(dev, SYS_RES_MEMORY, resp->io_rid, resp->io);
|
|
resp->io = NULL;
|
|
}
|
|
if (resp->mem != NULL) {
|
|
bus_release_resource(dev, SYS_RES_MEMORY, resp->mem_rid, resp->mem);
|
|
resp->mem = NULL;
|
|
}
|
|
}
|
|
|
|
static int pcmcsa_probe(device_t dev);
|
|
static int pcmcsa_attach(device_t dev);
|
|
|
|
static int
|
|
pcmcsa_probe(device_t dev)
|
|
{
|
|
char *s;
|
|
struct sndcard_func *func;
|
|
|
|
/* The parent device has already been probed. */
|
|
|
|
func = device_get_ivars(dev);
|
|
if (func == NULL || func->func != SCF_PCM)
|
|
return (ENXIO);
|
|
|
|
s = "CS461x PCM Audio";
|
|
|
|
device_set_desc(dev, s);
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
pcmcsa_attach(device_t dev)
|
|
{
|
|
snddev_info *devinfo;
|
|
struct csa_info *csa;
|
|
csa_res *resp;
|
|
int unit;
|
|
char status[SND_STATUSLEN];
|
|
struct ac97_info *codec;
|
|
struct sndcard_func *func;
|
|
|
|
devinfo = device_get_softc(dev);
|
|
csa = malloc(sizeof(*csa), M_DEVBUF, M_NOWAIT);
|
|
if (csa == NULL)
|
|
return (ENOMEM);
|
|
bzero(csa, sizeof(*csa));
|
|
unit = device_get_unit(dev);
|
|
func = device_get_ivars(dev);
|
|
csa->binfo = func->varinfo;
|
|
|
|
/* Allocate the resources. */
|
|
resp = &csa->res;
|
|
resp->io_rid = CS461x_IO_OFFSET;
|
|
resp->mem_rid = CS461x_MEM_OFFSET;
|
|
resp->irq_rid = 0;
|
|
if (csa_allocres(csa, dev)) {
|
|
csa_releaseres(csa, dev);
|
|
return (ENXIO);
|
|
}
|
|
|
|
if (csa_init(csa)) {
|
|
csa_releaseres(csa, dev);
|
|
return (ENXIO);
|
|
}
|
|
codec = ac97_create(csa, csa_rdcd, csa_wrcd);
|
|
if (codec == NULL)
|
|
return (ENXIO);
|
|
mixer_init(devinfo, &ac97_mixer, codec);
|
|
|
|
snprintf(status, SND_STATUSLEN, "at irq %ld", rman_get_start(resp->irq));
|
|
|
|
/* Enable interrupt. */
|
|
if (bus_setup_intr(dev, resp->irq, INTR_TYPE_TTY, csa_intr, csa, &csa->ih)) {
|
|
csa_releaseres(csa, dev);
|
|
return (ENXIO);
|
|
}
|
|
csa_writemem(resp, BA1_PFIE, csa_readmem(resp, BA1_PFIE) & ~0x0000f03f);
|
|
csa_writemem(resp, BA1_CIE, (csa_readmem(resp, BA1_CIE) & ~0x0000003f) | 0x00000001);
|
|
|
|
if (pcm_register(dev, csa, 1, 1)) {
|
|
csa_releaseres(csa, dev);
|
|
return (ENXIO);
|
|
}
|
|
pcm_addchan(dev, PCMDIR_REC, &csa_chantemplate, csa);
|
|
pcm_addchan(dev, PCMDIR_PLAY, &csa_chantemplate, csa);
|
|
pcm_setstatus(dev, status);
|
|
|
|
return (0);
|
|
}
|
|
|
|
/* ac97 codec */
|
|
|
|
static u_int32_t
|
|
csa_rdcd(void *devinfo, int regno)
|
|
{
|
|
u_int32_t data;
|
|
struct csa_info *csa = (struct csa_info *)devinfo;
|
|
|
|
if (csa_readcodec(&csa->res, regno + BA0_AC97_RESET, &data))
|
|
data = 0;
|
|
|
|
return data;
|
|
}
|
|
|
|
static void
|
|
csa_wrcd(void *devinfo, int regno, u_int32_t data)
|
|
{
|
|
struct csa_info *csa = (struct csa_info *)devinfo;
|
|
|
|
csa_writecodec(&csa->res, regno + BA0_AC97_RESET, data);
|
|
}
|
|
|
|
static device_method_t pcmcsa_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe , pcmcsa_probe ),
|
|
DEVMETHOD(device_attach, pcmcsa_attach),
|
|
|
|
{ 0, 0 },
|
|
};
|
|
|
|
static driver_t pcmcsa_driver = {
|
|
"pcm",
|
|
pcmcsa_methods,
|
|
sizeof(snddev_info),
|
|
};
|
|
|
|
static devclass_t pcm_devclass;
|
|
|
|
DRIVER_MODULE(pcmcsa, csa, pcmcsa_driver, pcm_devclass, 0, 0);
|