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were half of their physical offsets for ISA and 1/4 of their physical offsets for PCI, while all other Cyclades offsets were physical/1 for ISA and physical/2 for PCI. Logically wrong macros were used to scale CY16_RESET and CY_CLEAR_INTR to the correct physical offsets. Fixed some style bugs (mostly long lines).
76 lines
3.2 KiB
C
76 lines
3.2 KiB
C
/*-
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* Copyright (c) 1995 Bruce Evans.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: cyreg.h,v 1.7 1998/08/13 19:03:22 bde Exp $
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*/
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/*
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* Definitions for Cyclades Cyclom-Y serial boards.
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*/
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/*
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* Cyclades register offsets. These are physical offsets for ISA boards
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* and physical offsets divided by 2 for PCI boards.
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*/
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#define CY8_SVCACKR 0x100 /* (r) */
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#define CY8_SVCACKT 0x200 /* (r) */
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#define CY8_SVCACKM 0x300 /* (r) */
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#define CY16_RESET 0x1400 /* (r) */
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#define CY_CLEAR_INTR 0x1800 /* intr ack address (w) */
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#define CY_MAX_CD1400s 8 /* for Cyclom-32Y */
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#define CY_CLOCK(version) ((version) >= 0x48 ? 60000000 : 25000000)
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#define CY_RTS_DTR_SWAPPED(version) ((version) >= 0x48)
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/*
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* The `cd' macros are for access to cd1400 registers. The `cy' macros
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* are for access to Cyclades registers. Both sets of macros scale the
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* register number to get an offset, but the scales are different for
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* mostly historical reasons.
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*/
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#ifdef CyDebug
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#define cd_inb(iobase, reg, cy_align) \
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(++cd_inbs, *((iobase) + (2 * (reg) << (cy_align))))
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#define cy_inb(iobase, reg, cy_align) \
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(++cy_inbs, *((iobase) + ((reg) << (cy_align))))
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#define cd_outb(iobase, reg, cy_align, val) \
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(++cd_outbs, (void)(*((iobase) + (2 * (reg) << (cy_align))) = (val)))
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#define cy_outb(iobase, reg, cy_align, val) \
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(++cy_outbs, (void)(*((iobase) + ((reg) << (cy_align))) = (val)))
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#else
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#define cd_inb(iobase, reg, cy_align) \
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(*((iobase) + (2 * (reg) << (cy_align))))
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#define cy_inb(iobase, reg, cy_align) \
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(*((iobase) + ((reg) << (cy_align))))
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#define cd_outb(iobase, reg, cy_align, val) \
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((void)(*((iobase) + (2 * (reg) << (cy_align))) = (val)))
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#define cy_outb(iobase, reg, cy_align, val) \
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((void)(*((iobase) + ((reg) << (cy_align))) = (val)))
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#endif
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