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9bcb275009
This driver was generously developed and donated by Highpoint. It is enabled for i386 only at the moment. I will enable it for amd64 shortly. Obtained from: HighPoint Technologies, Inc.
441 lines
10 KiB
C
441 lines
10 KiB
C
#include <dev/rr232x/rr232x_config.h>
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/*
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* $Id: him.h,v 1.34 2006/02/21 06:11:19 gmm Exp $
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* Copyright (C) 2004-2005 HighPoint Technologies, Inc. All rights reserved.
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _HPT_HIM_H_
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#define _HPT_HIM_H_
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#define VERMAGIC_HIM 34
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#if defined(__cplusplus)
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extern "C" {
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#endif
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#include <dev/rr232x/list.h>
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#define SECTOR_TO_BYTE_SHIFT 9
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#define SECTOR_TO_BYTE(x) ((HPT_U32)(x) << SECTOR_TO_BYTE_SHIFT)
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#define BYTE_TO_SECTOR(x) ((x)>>SECTOR_TO_BYTE_SHIFT)
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typedef struct _PCI_ID
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{
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HPT_U16 vid;
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HPT_U16 did;
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HPT_U32 subsys;
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HPT_U8 rev;
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HPT_U8 nbase;
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HPT_U16 reserve;
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}
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PCI_ID;
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typedef struct _PCI_ADDRESS
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{
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HPT_U8 tree;
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HPT_U8 bus;
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HPT_U8 device;
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HPT_U8 function;
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}
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PCI_ADDRESS;
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typedef struct _HIM_ADAPTER_CONFIG
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{
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PCI_ADDRESS pci_addr;
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PCI_ID pci_id;
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HPT_U8 max_devices;
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HPT_U8 max_sg_descriptors;
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HPT_U8 bDevsPerBus;
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HPT_U8 first_on_slot;
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HPT_U8 bChipType;
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HPT_U8 bChipIntrNum;
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HPT_U8 bChipFlags;
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HPT_U8 bNumBuses;
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HPT_U8 szVendorID[36];
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HPT_U8 szProductID[36];
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}
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HIM_ADAPTER_CONFIG, *PHIM_ADAPTER_CONFIG;
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typedef struct _HIM_CHANNEL_CONFIG
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{
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HPT_U32 io_port;
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HPT_U32 ctl_port;
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} HIM_CHANNEL_CONFIG, *PHIM_CHANNEL_CONFIG;
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typedef struct _HIM_DEVICE_FLAGS
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{
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HPT_U32 df_atapi :1;
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HPT_U32 df_removable_drive :1;
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HPT_U32 df_on_line :1;
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HPT_U32 df_reduce_mode :1;
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HPT_U32 df_sata :1;
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HPT_U32 df_with_601 :1;
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HPT_U32 df_support_read_ahead :1;
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HPT_U32 df_read_ahead_enabled :1;
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HPT_U32 df_support_write_cache :1;
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HPT_U32 df_write_cache_enabled :1;
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HPT_U32 df_cdrom_device :1;
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HPT_U32 df_tape_device :1;
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HPT_U32 df_support_tcq :1;
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HPT_U32 df_tcq_enabled :1;
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HPT_U32 df_support_ncq :1;
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HPT_U32 df_ncq_enabled :1;
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} DEVICE_FLAGS, *PDEVICE_FLAGS;
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#pragma pack(1)
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typedef struct _IDENTIFY_DATA2 {
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HPT_U16 GeneralConfiguration;
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HPT_U16 NumberOfCylinders;
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HPT_U16 Reserved1;
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HPT_U16 NumberOfHeads;
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HPT_U16 UnformattedBytesPerTrack;
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HPT_U16 UnformattedBytesPerSector;
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HPT_U16 SectorsPerTrack;
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HPT_U16 VendorUnique1[3];
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HPT_U16 SerialNumber[10];
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HPT_U16 BufferType;
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HPT_U16 BufferSectorSize;
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HPT_U16 NumberOfEccBytes;
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HPT_U16 FirmwareRevision[4];
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HPT_U16 ModelNumber[20];
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HPT_U8 MaximumBlockTransfer;
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HPT_U8 VendorUnique2;
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HPT_U16 DoubleWordIo;
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HPT_U16 Capabilities;
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HPT_U16 Reserved2;
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HPT_U8 VendorUnique3;
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HPT_U8 PioCycleTimingMode;
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HPT_U8 VendorUnique4;
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HPT_U8 DmaCycleTimingMode;
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HPT_U16 TranslationFieldsValid;
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HPT_U16 NumberOfCurrentCylinders;
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HPT_U16 NumberOfCurrentHeads;
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HPT_U16 CurrentSectorsPerTrack;
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HPT_U32 CurrentSectorCapacity;
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HPT_U16 CurrentMultiSectorSetting;
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HPT_U32 UserAddressableSectors;
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HPT_U8 SingleWordDMASupport;
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HPT_U8 SingleWordDMAActive;
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HPT_U8 MultiWordDMASupport;
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HPT_U8 MultiWordDMAActive;
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HPT_U8 AdvancedPIOModes;
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HPT_U8 Reserved4;
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HPT_U16 MinimumMWXferCycleTime;
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HPT_U16 RecommendedMWXferCycleTime;
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HPT_U16 MinimumPIOCycleTime;
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HPT_U16 MinimumPIOCycleTimeIORDY;
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HPT_U16 Reserved5[2];
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HPT_U16 ReleaseTimeOverlapped;
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HPT_U16 ReleaseTimeServiceCommand;
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HPT_U16 MajorRevision;
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HPT_U16 MinorRevision;
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}
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#ifdef __GNUC__
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__attribute__((packed))
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#endif
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IDENTIFY_DATA2, *PIDENTIFY_DATA2;
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#pragma pack()
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#define _HPT601_INFO_DEVICEID 1
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#define _HPT601_INFO_TEMPERATURE 2
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#define _HPT601_INFO_FANSTATUS 4
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#define _HPT601_INFO_BEEPERCONTROL 8
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#define _HPT601_INFO_LED1CONTROL 0x10
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#define _HPT601_INFO_LED2CONTROL 0x20
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#define _HPT601_INFO_POWERSTATUS 0x40
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typedef struct __HPT601_INFO {
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HPT_U16 ValidFields;
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HPT_U16 DeviceId;
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HPT_U16 Temperature;
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HPT_U16 FanStatus;
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HPT_U16 BeeperControl;
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HPT_U16 LED1Control;
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HPT_U16 LED2Control;
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HPT_U16 PowerStatus;
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} _HPT601_INFO, *_PHPT601_INFO;
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typedef struct _HIM_DEVICE_CONFIG
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{
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HPT_U64 capacity;
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DEVICE_FLAGS flags;
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HPT_U8 path_id;
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HPT_U8 target_id;
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HPT_U8 max_queue_depth;
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HPT_U8 spin_up_mode;
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HPT_U8 reserved;
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HPT_U8 transfer_mode;
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HPT_U8 bMaxShowMode;
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HPT_U8 bDeUsable_Mode;
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HPT_U16 max_sectors_per_cmd;
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PIDENTIFY_DATA2 pIdentifyData;
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_HPT601_INFO chip601;
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}
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HIM_DEVICE_CONFIG, *PHIM_DEVICE_CONFIG;
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#define _DIT_MODE 0
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#define _DIT_601 1
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#define _DIT_READ_AHEAD 2
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#define _DIT_WRITE_CACHE 3
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#define _DIT_TCQ 4
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#define _DIT_NCQ 5
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#define _DIT_BEEP_OFF 6
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#define _DIT_SPIN_UP_MODE 7
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#define SPIN_UP_MODE_NOSUPPORT 0
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#define SPIN_UP_MODE_FULL 1
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#define SPIN_UP_MODE_STANDBY 2
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struct tcq_control {
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HPT_U8 enable;
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HPT_U8 depth;
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};
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struct ncq_control {
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HPT_U8 enable;
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HPT_U8 depth;
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};
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typedef struct _HIM_ALTERABLE_DEV_INFO{
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HPT_U8 type;
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union {
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HPT_U8 mode;
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HPT_U8 enable_read_ahead;
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HPT_U8 enable_read_cache;
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HPT_U8 enable_write_cache;
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struct tcq_control tcq;
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struct ncq_control ncq;
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_HPT601_INFO chip601;
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void * adapter;
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HPT_U8 spin_up_mode;
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}u;
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} HIM_ALTERABLE_DEV_INFO, *PHIM_ALTERABLE_DEV_INFO;
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struct _COMMAND;
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struct _IOCTL_ARG;
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typedef void (*PROBE_CALLBACK)(void *arg, void *dev, int index);
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typedef struct _HIM {
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char *name;
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struct _HIM *next;
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HPT_U8 max_sg_descriptors;
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#define _HIM_INTERFACE(_type, _fn, _args) _type (* _fn) _args;
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#include <dev/rr232x/himfuncs.h>
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}
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HIM, *PHIM;
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#pragma pack(1)
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#ifdef SG_FLAG_EOT
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#error "don't use SG_FLAG_EOT with _SG.eot. clean the code!"
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#endif
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typedef struct _SG {
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HPT_U32 size;
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HPT_UINT eot;
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union {
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HPT_U8 FAR * _logical;
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BUS_ADDRESS bus;
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}
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addr;
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}
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SG, *PSG;
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#pragma pack()
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typedef struct _AtaCommand
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{
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HPT_U64 Lba;
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HPT_U16 nSectors;
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HPT_U16 pad;
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} AtaComm, *PAtaComm;
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typedef struct _PassthroughCmd {
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HPT_U8 bFeaturesReg;
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HPT_U8 bSectorCountReg;
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HPT_U8 bLbaLowReg;
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HPT_U8 bLbaMidReg;
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HPT_U8 bLbaHighReg;
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HPT_U8 bDriveHeadReg;
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HPT_U8 bCommandReg;
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HPT_U8 nSectors;
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HPT_U8 *pDataBuffer;
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}
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PassthroughCmd;
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#define CTRL_CMD_REBUILD 1
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#define CTRL_CMD_VERIFY 2
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#define CTRL_CMD_INIT 3
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typedef struct _R5ControlCmd {
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HPT_U64 StripeLine;
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HPT_U16 Offset;
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HPT_U8 Command;
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HPT_U8 reserve1;
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}
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R5ControlCmd, *PR5ControlCmd;
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typedef struct _HPT_ADDRESS
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{
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HPT_U8 * logical;
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BUS_ADDRESS bus;
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}
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HPT_ADDRESS;
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typedef struct ctl_pages {
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HPT_ADDRESS *pages;
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HPT_UINT page_size;
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HPT_UINT npages;
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HPT_U8 min_sg_descriptors;
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} CONTROL_PAGES, *PCONTROL_PAGES;
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typedef struct _R1ControlCmd {
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HPT_U64 Lba;
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HPT_U16 nSectors;
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HPT_U8 Command; /* CTRL_CMD_XXX */
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HPT_U8 reserve1;
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PCONTROL_PAGES ctl_pages;
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}
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R1ControlCmd, *PR1ControlCmd;
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typedef void (*TQ_PROC)(void *arg);
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struct tq_item {
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TQ_PROC proc;
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void *arg;
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struct tq_item *next;
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};
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#define INIT_TQ_ITEM(t, p, a) \
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do { (t)->proc = p; (t)->arg = a; (t)->next = 0; } while (0)
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typedef struct _COMMAND
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{
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struct _VBUS * vbus;
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struct freelist *grplist;
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HPT_UINT grpcnt;
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HPT_UINT freecnt;
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struct list_head q_link;
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struct tq_item done_dpc;
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HPT_UINT extsize;
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void *ext;
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void *target;
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void *priv;
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HPT_UPTR priv2;
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int priority;
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struct lock_request *owned_lock;
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struct lock_request *lock_req;
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union{
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/* Ide Command */
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AtaComm Ide;
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PassthroughCmd Passthrough;
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/* Atapi Command */
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HPT_U8 Atapi[12];
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/* Control command */
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R5ControlCmd R5Control;
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R1ControlCmd R1Control;
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} uCmd;
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HPT_U8 type; /* CMD_TYPE_* */
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struct {
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HPT_U8 physical_sg: 1;
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HPT_U8 data_in: 1;
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HPT_U8 data_out: 1;
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HPT_U8 transform : 1;
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HPT_U8 hard_flush: 2;
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} flags;
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/* return status */
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HPT_U8 Result;
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/* retry count */
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HPT_U8 RetryCount;
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PSG psg;
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int (*buildsgl)(struct _COMMAND *cmd, PSG psg, int logical);
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void (*done)(struct _COMMAND *cmd);
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}
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COMMAND, *PCOMMAND;
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/* command types */
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#define CMD_TYPE_IO 0
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#define CMD_TYPE_CONTROL 1
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#define CMD_TYPE_ATAPI 2
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#define CMD_TYPE_PASSTHROUGH 3
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#define CMD_TYPE_FLUSH 4
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/* flush command flags */
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#define CF_HARD_FLUSH_CACHE 1
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#define CF_HARD_FLUSH_STANDBY 2
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/* command return values */
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#define RETURN_PENDING 0
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#define RETURN_SUCCESS 1
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#define RETURN_BAD_DEVICE 2
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#define RETURN_BAD_PARAMETER 3
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#define RETURN_WRITE_NO_DRQ 4
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#define RETURN_DEVICE_BUSY 5
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#define RETURN_INVALID_REQUEST 6
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#define RETURN_SELECTION_TIMEOUT 7
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#define RETURN_IDE_ERROR 8
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#define RETURN_NEED_LOGICAL_SG 9
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#define RETURN_NEED_PHYSICAL_SG 10
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#define RETURN_RETRY 11
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#define RETURN_DATA_ERROR 12
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#define RETURN_BUS_RESET 13
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#define RETURN_BAD_TRANSFER_LENGTH 14
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#define RETURN_INSUFFICIENT_MEMORY 15
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#if defined(__cplusplus)
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}
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#endif
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#endif
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