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New kernel events can be added at various location for sampling or counting. This will for example allow easy system profiling whatever the processor is with known tools like pmcstat(8). Simultaneous usage of software PMC and hardware PMC is possible, for example looking at the lock acquire failure, page fault while sampling on instructions. Sponsored by: NETASQ MFC after: 1 month
151 lines
4.5 KiB
Groff
151 lines
4.5 KiB
Groff
.\" Copyright (c) 2008 Joseph Koshy. All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd November 14, 2008
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.Dt PMC.IAF 3
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.Os
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.Sh NAME
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.Nm pmc.iaf
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.Nd measurement events for
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.Tn Intel
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fixed function performance counters.
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.Sh LIBRARY
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.Lb libpmc
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.Sh SYNOPSIS
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.In pmc.h
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.Sh DESCRIPTION
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.Tn Intel
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fixed-function PMCs are present in CPUs that conform to version 2 or
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later of the
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.Tn Intel
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Performance Measurement Architecture.
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Each fixed-function PMC measures a specific hardware event.
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The number of fixed-function PMCs implemented in a CPU can vary.
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The number of fixed-function PMCs present can be determined at runtime
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by using function
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.Xr pmc_cpuinfo 3 .
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.Pp
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Intel fixed-function PMCs are documented in
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.Rs
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.%B "IA-32 Intel(R) Architecture Software Developer's Manual"
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.%T "Volume 3: System Programming Guide"
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.%N "Order Number 253669-027US"
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.%D July 2008
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.%Q "Intel Corporation"
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.Re
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.Pp
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.Ss PMC Capabilities
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Fixed-function PMCs support the following capabilities:
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.Bl -column "PMC_CAP_INTERRUPT" "Support"
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.It Em Capability Ta Em Support
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.It PMC_CAP_CASCADE Ta \&No
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.It PMC_CAP_EDGE Ta \&No
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.It PMC_CAP_INTERRUPT Ta Yes
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.It PMC_CAP_INVERT Ta \&No
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.It PMC_CAP_READ Ta Yes
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.It PMC_CAP_PRECISE Ta \&No
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.It PMC_CAP_SYSTEM Ta Yes
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.It PMC_CAP_TAGGING Ta \&No
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.It PMC_CAP_THRESHOLD Ta \&No
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.It PMC_CAP_USER Ta Yes
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.It PMC_CAP_WRITE Ta Yes
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.El
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.Ss Class Name Prefix
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These PMCs are named using a class name prefix of
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.Dq Li iaf- .
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.Ss Event Qualifiers (Fixed Function PMCs)
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These PMCs support the following modifiers:
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.Bl -tag -width indent
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.It Li os
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Configure the PMC to count events occurring at ring level 0.
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.It Li usr
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Configure the PMC to count events occurring at ring levels 1, 2
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or 3.
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.It Li anythread
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.Pq Tn Atom CPUs
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Configure the PMC to count events on all logical processors sharing a
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processor core.
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The default is to count events on the current logical processor.
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.El
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.Pp
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If neither of the
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.Dq Li os
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or
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.Dq Li usr
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qualifiers are specified, the default is to enable both.
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.Ss Event Specifiers (Fixed Function PMCs)
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The fixed function PMCs are selectable using the following
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event names:
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.Bl -tag -width indent
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.It Li INSTR_RETIRED.ANY
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.Pq Fixed Function Counter 0
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The number of instructions retired.
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.It Li CPU_CLK_UNHALTED.CORE
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.Pq Fixed Function Counter 1
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The number of core cycles for which the core is not halted.
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.It Li CPU_CLK_UNHALTED.REF
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.Pq Fixed Function Counter 2
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The number of reference cycles for which the core is not halted.
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.El
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.Sh EXAMPLES
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To measure the number of core cycles for which the core was not halted
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use the event specifier
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.Qq iaf-cpu-clk-unhalted.core .
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.Pp
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To measure the number of user instructions retired use the event specifier
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.Qq iaf-instr-retired.any,usr .
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.Pp
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To measure the number of user instructions retired on all logical processors
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in an
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.Tn Atom
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CPU, use the event specifier
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.Qq iaf-instr-retired.any,usr,anythread .
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.Sh SEE ALSO
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.Xr pmc 3 ,
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.Xr pmc.atom 3 ,
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.Xr pmc.core 3 ,
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.Xr pmc.core2 3 ,
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.Xr pmc.k7 3 ,
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.Xr pmc.k8 3 ,
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.Xr pmc.p4 3 ,
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.Xr pmc.p5 3 ,
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.Xr pmc.p6 3 ,
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.Xr pmc.soft 3 ,
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.Xr pmc.tsc 3 ,
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.Xr pmc_cpuinfo 3 ,
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.Xr pmclog 3 ,
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.Xr hwpmc 4
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.Sh HISTORY
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The
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.Nm pmc
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library first appeared in
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.Fx 6.0 .
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.Sh AUTHORS
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The
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.Lb libpmc
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library was written by
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.An "Joseph Koshy"
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.Aq jkoshy@FreeBSD.org .
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