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938b878e45
switching anymore, so there's no need to save and restore GP. This change breaks threaded applications linked against libc_r. Pull the tier 2 card again: relink. This will link against libthr instead.
311 lines
8.5 KiB
ArmAsm
311 lines
8.5 KiB
ArmAsm
//
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// Copyright (c) 1999, 2000
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// Intel Corporation.
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// 1. Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// 3. All advertising materials mentioning features or use of this software
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// must display the following acknowledgement:
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//
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// This product includes software developed by Intel Corporation and
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// its contributors.
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//
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// 4. Neither the name of Intel Corporation or its contributors may be
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// used to endorse or promote products derived from this software
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// without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY INTEL CORPORATION AND CONTRIBUTORS ``AS IS''
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL INTEL CORPORATION OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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// THE POSSIBILITY OF SUCH DAMAGE.
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//
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//
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//
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// Module Name:
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//
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// setjmp.s
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//
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// Abstract:
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//
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// Contains an implementation of setjmp and longjmp for the
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// IA-64 architecture.
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.file "setjmp.s"
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#include <machine/asm.h>
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__FBSDID("$FreeBSD$");
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#define LOCORE
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#include <machine/setjmp.h>
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// int _setjmp(struct jmp_buffer *)
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//
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// Setup a non-local goto.
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//
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// Description:
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//
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// SetJump stores the current register set in the area pointed to
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// by "save". It returns zero. Subsequent calls to "LongJump" will
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// restore the registers and return non-zero to the same location.
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//
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// On entry, r32 contains the pointer to the jmp_buffer
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//
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ENTRY(_setjmp, 1)
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add r10 = J_PREDS, r32 // skip Unats & pfs save area
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add r11 = J_BSP, r32
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//
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// save immediate context
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//
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mov r2 = ar.bsp // save backing store pointer
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mov r3 = pr // save predicates
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flushrs
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;;
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//
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// save user Unat register
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//
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mov r16 = ar.lc // save loop count register
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mov r14 = ar.unat // save user Unat register
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st8 [r10] = r3, J_LC-J_PREDS
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st8 [r11] = r2, J_R4-J_BSP
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;;
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st8 [r10] = r16, J_R5-J_LC
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st8 [r32] = r14, J_NATS // Note: Unat at the
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// beginning of the save area
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mov r15 = ar.pfs
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;;
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//
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// save preserved general registers & NaT's
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//
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.mem.offset 0,0
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st8.spill [r11] = r4, J_R6-J_R4
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.mem.offset 8,0
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st8.spill [r10] = r5, J_R7-J_R5
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;;
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.mem.offset 16,0
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st8.spill [r11] = r6, J_SP-J_R6
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.mem.offset 24,0
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st8.spill [r10] = r7, J_F3-J_R7
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;;
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st8.spill [r11] = sp, J_F2-J_SP
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mov r16 = ar.rsc
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;;
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//
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// save spilled Unat and pfs registers
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//
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mov r2 = ar.unat // save Unat register after spill
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mov ar.rsc = r0
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;;
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st8 [r32] = r2, J_PFS-J_NATS // save unat for spilled regs
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mov r17 = ar.rnat
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;;
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st8 [r32] = r15, J_RNAT-J_PFS // save pfs
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mov ar.rsc = r16
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//
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// save floating registers
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//
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stf.spill [r11] = f2, J_F4-J_F2
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stf.spill [r10] = f3, J_F5-J_F3
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;;
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stf.spill [r11] = f4, J_F16-J_F4
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stf.spill [r10] = f5, J_F17-J_F5
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;;
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stf.spill [r11] = f16, J_F18-J_F16
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stf.spill [r10] = f17, J_F19-J_F17
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;;
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stf.spill [r11] = f18, J_F20-J_F18
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stf.spill [r10] = f19, J_F21-J_F19
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;;
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stf.spill [r11] = f20, J_F22-J_F20
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stf.spill [r10] = f21, J_F23-J_F21
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;;
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stf.spill [r11] = f22, J_F24-J_F22
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stf.spill [r10] = f23, J_F25-J_F23
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;;
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stf.spill [r11] = f24, J_F26-J_F24
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stf.spill [r10] = f25, J_F27-J_F25
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;;
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stf.spill [r11] = f26, J_F28-J_F26
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stf.spill [r10] = f27, J_F29-J_F27
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;;
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stf.spill [r11] = f28, J_F30-J_F28
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stf.spill [r10] = f29, J_F31-J_F29
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;;
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stf.spill [r11] = f30, J_FPSR-J_F30
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stf.spill [r10] = f31, J_B0-J_F31 // size of f31 + fpsr
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;;
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st8 [r32] = r17
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//
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// save FPSR register & branch registers
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//
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mov r2 = ar.fpsr // save fpsr register
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mov r3 = b0
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;;
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st8 [r11] = r2, J_B1-J_FPSR
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st8 [r10] = r3, J_B2-J_B0
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mov r2 = b1
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mov r3 = b2
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;;
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st8 [r11] = r2, J_B3-J_B1
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st8 [r10] = r3, J_B4-J_B2
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mov r2 = b3
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mov r3 = b4
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;;
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st8 [r11] = r2, J_B5-J_B3
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st8 [r10] = r3
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mov r2 = b5
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;;
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st8 [r11] = r2
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;;
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//
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// return
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//
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mov r8 = r0 // return 0 from setjmp
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mov ar.unat = r14 // restore unat
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br.ret.sptk b0
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END(_setjmp)
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//
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// void _longjmp(struct jmp_buffer *, int val)
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//
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// Perform a non-local goto.
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//
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// Description:
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//
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// LongJump initializes the register set to the values saved by a
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// previous 'SetJump' and jumps to the return location saved by that
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// 'SetJump'. This has the effect of unwinding the stack and returning
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// for a second time to the 'SetJump'.
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//
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WEAK_ALIAS(_longjmp,___longjmp)
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ENTRY(___longjmp, 2)
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mov r14 = ar.rsc // get user RSC conf
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mov r8 = r33 // return value
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add r10 = J_PFS, r32 // get address of pfs
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;;
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mov ar.rsc = r0
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add r11 = J_NATS, r32
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add r17 = J_RNAT, r32
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;;
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ld8 r15 = [r10], J_BSP-J_PFS // get pfs
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ld8 r2 = [r11], J_LC-J_NATS // get unat for spilled regs
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mov r31 = r32
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;;
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loadrs
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mov ar.unat = r2
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cmp.eq p6,p0=0,r8 // Return value 0?
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;;
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ld8 r16 = [r10], J_PREDS-J_BSP // get backing store pointer
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ld8 r17 = [r17] // ar.rnat
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mov ar.pfs = r15
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;;
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mov ar.bspstore = r16
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(p6) add r8 = 1, r0
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;;
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mov ar.rnat = r17
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mov ar.rsc = r14 // restore RSC conf
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ld8 r3 = [r11], J_R4-J_LC // get lc register
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ld8 r2 = [r10], J_R5-J_PREDS // get predicates
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;;
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mov pr = r2, -1
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mov ar.lc = r3
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//
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// restore preserved general registers & NaT's
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//
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ld8.fill r4 = [r11], J_R6-J_R4
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;;
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ld8.fill r5 = [r10], J_R7-J_R5
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ld8.fill r6 = [r11], J_SP-J_R6
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;;
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ld8.fill r7 = [r10], J_F2-J_R7
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ld8.fill sp = [r11], J_F3-J_SP
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;;
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//
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// restore floating registers
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//
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ldf.fill f2 = [r10], J_F4-J_F2
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ldf.fill f3 = [r11], J_F5-J_F3
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;;
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ldf.fill f4 = [r10], J_F16-J_F4
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ldf.fill f5 = [r11], J_F17-J_F5
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;;
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ldf.fill f16 = [r10], J_F18-J_F16
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ldf.fill f17 = [r11], J_F19-J_F17
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;;
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ldf.fill f18 = [r10], J_F20-J_F18
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ldf.fill f19 = [r11], J_F21-J_F19
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;;
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ldf.fill f20 = [r10], J_F22-J_F20
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ldf.fill f21 = [r11], J_F23-J_F21
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;;
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ldf.fill f22 = [r10], J_F24-J_F22
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ldf.fill f23 = [r11], J_F25-J_F23
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;;
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ldf.fill f24 = [r10], J_F26-J_F24
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ldf.fill f25 = [r11], J_F27-J_F25
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;;
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ldf.fill f26 = [r10], J_F28-J_F26
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ldf.fill f27 = [r11], J_F29-J_F27
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;;
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ldf.fill f28 = [r10], J_F30-J_F28
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ldf.fill f29 = [r11], J_F31-J_F29
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;;
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ldf.fill f30 = [r10], J_FPSR-J_F30
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ldf.fill f31 = [r11], J_B0-J_F31 ;;
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//
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// restore branch registers and fpsr
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//
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ld8 r16 = [r10], J_B1-J_FPSR // get fpsr
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ld8 r17 = [r11], J_B2-J_B0 // get return pointer
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;;
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mov ar.fpsr = r16
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mov b0 = r17
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ld8 r2 = [r10], J_B3-J_B1
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ld8 r3 = [r11], J_B4-J_B2
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;;
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mov b1 = r2
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mov b2 = r3
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ld8 r2 = [r10], J_B5-J_B3
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ld8 r3 = [r11]
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;;
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mov b3 = r2
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mov b4 = r3
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ld8 r2 = [r10]
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ld8 r21 = [r31] // get user unat
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;;
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mov b5 = r2
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mov ar.unat = r21
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//
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// invalidate ALAT
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//
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invala ;;
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br.ret.sptk b0
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END(___longjmp)
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