Marcel Moolenaar 719325db8e Fix the last remaining problem encountered by KSE: apparently it is ... not guaranteed that the RSE writes the NaT collection immediately, sort of atomically, to the backing store when it writes the register immediately prior to the NaT collection point. This means that we cannot assume that the low 9 bits of the backingstore pointer do not point to the NaT collection. This is rather a surprise and I don't know at this time if it's a bug in the Merced or that it's actually a valid condition of the architecture. A quick scan over the sources does not indicate that we depend on the false assumption elsewhere, but it's something to keep in mind. The fix is to write the saved contents of the ar.rnat register to the backingstore prior to entering the loop that copies the dirty registers from the kernel stack to the user stack.		2003-09-20 20:34:58 +00:00
..
acpica	Move the definitions for ACPI MADT table entries not present in the ACPICA	2003-09-10 06:32:27 +00:00
compile
conf	Introduce IA64_ID_PAGE_{MASK|SHIFT|SIZE} and LOG2_ID_PAGE_SIZE. The	2003-09-09 05:59:09 +00:00
ia32	Regen.	2003-08-21 14:16:41 +00:00
ia64	Fix the last remaining problem encountered by KSE: apparently it is	2003-09-20 20:34:58 +00:00
include	Change TRAPF_USERMODE and CLOCKF_USERMODE to not test for CPL == 3,	2003-09-19 07:48:22 +00:00
isa	Mega busdma API commit.	2003-07-01 15:52:06 +00:00
pci	Delete legacy pcib code - we can't possibly work without acpi on ia64.	2001-10-06 10:09:57 +00:00