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https://git.FreeBSD.org/src.git
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ec502c357d
* Track recent changes to SWI code. * Allocate RIDs for pmaps (untested). * Implement assembler version of cpu_switch - its cleaner that way.
1169 lines
21 KiB
C
1169 lines
21 KiB
C
/*-
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* Copyright (c) 2000 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_INST_H_
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#define _MACHINE_INST_H_
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union ia64_instruction {
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struct {
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u_int64_t qp :6;
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u_int64_t r1 :7;
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u_int64_t r2 :7;
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u_int64_t r3 :7;
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u_int64_t x4 :4;
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u_int64_t v :1;
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u_int64_t x2a :2;
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u_int64_t resv :1;
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u_int64_t op :4;
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} A1;
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struct {
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u_int64_t qp :6;
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u_int64_t r1 :7;
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u_int64_t r2 :7;
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u_int64_t r3 :7;
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u_int64_t ct2d :2;
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u_int64_t x4 :4;
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u_int64_t v :1;
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u_int64_t x2a :2;
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|
u_int64_t resv :1;
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u_int64_t op :4;
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} A2;
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struct {
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|
u_int64_t qp :6;
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|
u_int64_t r1 :7;
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|
u_int64_t imm7b :7;
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|
u_int64_t r3 :7;
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|
u_int64_t x2b :2;
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|
u_int64_t x4 :4;
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|
u_int64_t v :1;
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u_int64_t x2a :2;
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|
u_int64_t s :1;
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|
u_int64_t op :4;
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} A3;
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struct {
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u_int64_t qp :6;
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|
u_int64_t r1 :7;
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|
u_int64_t imm7b :7;
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u_int64_t r3 :7;
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u_int64_t imm6d :6;
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u_int64_t v :1;
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u_int64_t x2a :2;
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u_int64_t s :1;
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u_int64_t op :4;
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} A4;
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struct {
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u_int64_t qp :6;
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|
u_int64_t r1 :7;
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|
u_int64_t imm7b :7;
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|
u_int64_t r3 :2;
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|
u_int64_t imm5c :5;
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u_int64_t imm9d :9;
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u_int64_t s :1;
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u_int64_t op :4;
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} A5;
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struct {
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u_int64_t qp :6;
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|
u_int64_t p1 :6;
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|
u_int64_t c :1;
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|
u_int64_t r2 :7;
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|
u_int64_t r3 :7;
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|
u_int64_t p2 :6;
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u_int64_t ta :1;
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|
u_int64_t x2 :2;
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|
u_int64_t tb :1;
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u_int64_t op :4;
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} A6;
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struct {
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u_int64_t qp :6;
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|
u_int64_t p1 :6;
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u_int64_t c :1;
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u_int64_t zero :7;
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u_int64_t r3 :7;
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|
u_int64_t p2 :6;
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|
u_int64_t ta :1;
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u_int64_t x2 :2;
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u_int64_t tb :1;
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u_int64_t op :4;
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} A7;
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struct {
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u_int64_t qp :6;
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|
u_int64_t p1 :6;
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u_int64_t c :1;
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|
u_int64_t imm7b :7;
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|
u_int64_t r3 :7;
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|
u_int64_t p2 :6;
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|
u_int64_t ta :1;
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|
u_int64_t x2 :2;
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|
u_int64_t s :1;
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|
u_int64_t op :4;
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} A8;
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|
struct {
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|
u_int64_t qp :6;
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|
u_int64_t r1 :7;
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|
u_int64_t r2 :7;
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|
u_int64_t r3 :7;
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|
u_int64_t x2b :2;
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|
u_int64_t x4 :4;
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|
u_int64_t zb :1;
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|
u_int64_t x2a :2;
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|
u_int64_t za :1;
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|
u_int64_t op :4;
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} A9;
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struct {
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u_int64_t qp :6;
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u_int64_t r1 :7;
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u_int64_t r2 :7;
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u_int64_t r3 :7;
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u_int64_t ct2d :2;
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u_int64_t x4 :4;
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u_int64_t zb :1;
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u_int64_t x2a :2;
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u_int64_t za :1;
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u_int64_t op :4;
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} A10;
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struct {
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u_int64_t qp :6;
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u_int64_t r1 :7;
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u_int64_t r2 :7;
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u_int64_t r3 :7;
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u_int64_t resv :1;
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u_int64_t x2b :2;
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u_int64_t ct2d :2;
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u_int64_t ve :1;
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u_int64_t zb :1;
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u_int64_t x2a :2;
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u_int64_t za :1;
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u_int64_t op :4;
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} I1;
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struct {
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u_int64_t qp :6;
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u_int64_t r1 :7;
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u_int64_t r2 :7;
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u_int64_t r3 :7;
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u_int64_t resv :1;
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u_int64_t x2b :2;
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u_int64_t x2c :2;
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u_int64_t ve :1;
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u_int64_t zb :1;
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u_int64_t x2a :2;
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u_int64_t za :1;
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u_int64_t op :4;
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} I2;
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struct {
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u_int64_t qp :6;
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u_int64_t r1 :7;
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u_int64_t r2 :7;
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u_int64_t mbt4c :4;
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u_int64_t resv :4;
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u_int64_t x2b :2;
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u_int64_t x2c :2;
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u_int64_t ve :1;
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u_int64_t zb :1;
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u_int64_t x2a :2;
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u_int64_t za :1;
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u_int64_t op :4;
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} I3;
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struct {
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u_int64_t qp :6;
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u_int64_t r1 :7;
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u_int64_t r2 :7;
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u_int64_t mht8c :8;
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u_int64_t x2b :2;
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u_int64_t x2c :2;
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u_int64_t ve :1;
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u_int64_t zb :1;
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u_int64_t x2a :2;
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u_int64_t za :1;
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u_int64_t op :4;
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} I4;
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struct {
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|
u_int64_t qp :6;
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u_int64_t r1 :7;
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u_int64_t r2 :7;
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u_int64_t r3 :7;
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u_int64_t resv :1;
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u_int64_t x2b :2;
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u_int64_t x2c :2;
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u_int64_t ve :1;
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u_int64_t zb :1;
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u_int64_t x2a :2;
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u_int64_t za :1;
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u_int64_t op :4;
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} I5;
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struct {
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u_int64_t qp :6;
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u_int64_t r1 :7;
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u_int64_t resv1 :1;
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u_int64_t count5b :5;
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u_int64_t resv2 :1;
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u_int64_t r3 :7;
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u_int64_t resv3 :1;
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u_int64_t x2b :2;
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u_int64_t x2c :2;
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u_int64_t ve :1;
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u_int64_t zb :1;
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u_int64_t x2a :2;
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|
u_int64_t za :1;
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u_int64_t op :4;
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} I6;
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struct {
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u_int64_t qp :6;
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u_int64_t r1 :7;
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u_int64_t r2 :7;
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u_int64_t r3 :7;
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u_int64_t resv :1;
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u_int64_t x2b :2;
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u_int64_t x2c :2;
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|
u_int64_t ve :1;
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|
u_int64_t zb :1;
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|
u_int64_t x2a :2;
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|
u_int64_t za :1;
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|
u_int64_t op :4;
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|
} I7;
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|
struct {
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|
u_int64_t qp :6;
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|
u_int64_t r1 :7;
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|
u_int64_t r2 :7;
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|
u_int64_t count5c :5;
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|
u_int64_t resv :2;
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|
u_int64_t x2b :2;
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|
u_int64_t x2c :2;
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|
u_int64_t ve :1;
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|
u_int64_t zb :1;
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|
u_int64_t x2a :2;
|
|
u_int64_t za :1;
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|
u_int64_t op :4;
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|
} I8;
|
|
struct {
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|
u_int64_t qp :6;
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|
u_int64_t r1 :7;
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|
u_int64_t zero :7;
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|
u_int64_t r3 :7;
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|
u_int64_t resv :1;
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|
u_int64_t x2b :2;
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|
u_int64_t x2c :2;
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|
u_int64_t ve :1;
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|
u_int64_t zb :1;
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|
u_int64_t x2a :2;
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|
u_int64_t za :1;
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|
u_int64_t op :4;
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|
} I9;
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|
struct {
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|
u_int64_t qp :6;
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u_int64_t r1 :7;
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u_int64_t r2 :7;
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u_int64_t r3 :7;
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|
u_int64_t count6d :6;
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|
u_int64_t x :1;
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u_int64_t x2 :2;
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|
u_int64_t resv :1;
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u_int64_t op :4;
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} I10;
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struct {
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|
u_int64_t qp :6;
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|
u_int64_t r1 :7;
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u_int64_t y :1;
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u_int64_t pos6b :6;
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u_int64_t r3 :7;
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u_int64_t len6d :6;
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u_int64_t x :1;
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u_int64_t x2 :2;
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u_int64_t resv :1;
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u_int64_t op :4;
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} I11;
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struct {
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u_int64_t qp :6;
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u_int64_t r1 :7;
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u_int64_t r2 :7;
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u_int64_t cpos6c :6;
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u_int64_t y :1;
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u_int64_t len6d :6;
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u_int64_t x :1;
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u_int64_t x2 :2;
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u_int64_t resv :1;
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u_int64_t op :4;
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} I12;
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struct {
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u_int64_t qp :6;
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u_int64_t r1 :7;
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u_int64_t imm7b :7;
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u_int64_t cpos6c :6;
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u_int64_t y :1;
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u_int64_t len6d :6;
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u_int64_t x :1;
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u_int64_t x2 :2;
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u_int64_t s :1;
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u_int64_t op :4;
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} I13;
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struct {
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u_int64_t qp :6;
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|
u_int64_t r1 :7;
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u_int64_t resv :1;
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u_int64_t cpos6b :6;
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u_int64_t r3 :7;
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|
u_int64_t len6d :6;
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|
u_int64_t x :1;
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|
u_int64_t x2 :2;
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|
u_int64_t s :1;
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|
u_int64_t op :4;
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} I14;
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|
struct {
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|
u_int64_t qp :6;
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|
u_int64_t r1 :7;
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|
u_int64_t r2 :7;
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|
u_int64_t r3 :7;
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|
u_int64_t len4d :6;
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|
u_int64_t cpos6d :6;
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|
u_int64_t op :4;
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} I15;
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|
struct {
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|
u_int64_t qp :6;
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u_int64_t p1 :6;
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|
u_int64_t c :1;
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|
u_int64_t y :1;
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|
u_int64_t pos6b :6;
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|
u_int64_t r3 :7;
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|
u_int64_t p2 :6;
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|
u_int64_t ta :1;
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|
u_int64_t x2 :2;
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|
u_int64_t tb :1;
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|
u_int64_t op :4;
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|
} I16;
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|
struct {
|
|
u_int64_t qp :6;
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|
u_int64_t p1 :6;
|
|
u_int64_t c :1;
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|
u_int64_t y :1;
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|
u_int64_t resv :6;
|
|
u_int64_t r3 :7;
|
|
u_int64_t p2 :6;
|
|
u_int64_t ta :1;
|
|
u_int64_t x2 :2;
|
|
u_int64_t tb :1;
|
|
u_int64_t op :4;
|
|
} I17;
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|
struct {
|
|
u_int64_t qp :6;
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|
u_int64_t imm20a :20;
|
|
u_int64_t resv :1;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t i :1;
|
|
u_int64_t op :4;
|
|
} I19;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t imm7a :7;
|
|
u_int64_t r2 :7;
|
|
u_int64_t imm13c :13;
|
|
u_int64_t x3 :3;
|
|
u_int64_t s :1;
|
|
u_int64_t op :4;
|
|
} I20;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t b1 :3;
|
|
u_int64_t resv1 :4;
|
|
u_int64_t r2 :7;
|
|
u_int64_t wh :2;
|
|
u_int64_t x :1;
|
|
u_int64_t ih :1;
|
|
u_int64_t timm9c :9;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv2 :1;
|
|
u_int64_t op :4;
|
|
} I21;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t r1 :7;
|
|
u_int64_t b2 :3;
|
|
u_int64_t resv1 :11;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv2 :1;
|
|
u_int64_t op :4;
|
|
} I22;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t mask7a :7;
|
|
u_int64_t r2 :7;
|
|
u_int64_t resv1 :4;
|
|
u_int64_t mask8c :8;
|
|
u_int64_t resv2 :1;
|
|
u_int64_t x3 :3;
|
|
u_int64_t s :1;
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|
u_int64_t op :4;
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|
} I23;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t imm27a :27;
|
|
u_int64_t x3 :3;
|
|
u_int64_t s :1;
|
|
u_int64_t op :4;
|
|
} I24;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t r1 :7;
|
|
u_int64_t resv1 :14;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv2 :1;
|
|
u_int64_t op :4;
|
|
} I25;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t resv1 :7;
|
|
u_int64_t r2 :7;
|
|
u_int64_t ar3 :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv2 :1;
|
|
u_int64_t op :4;
|
|
} I26;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t resv1 :7;
|
|
u_int64_t imm7b :7;
|
|
u_int64_t ar3 :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t s :1;
|
|
u_int64_t op :4;
|
|
} I27;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t r1 :7;
|
|
u_int64_t resv1 :7;
|
|
u_int64_t ar3 :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv2 :1;
|
|
u_int64_t op :4;
|
|
} I28;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t r1 :7;
|
|
u_int64_t resv1 :7;
|
|
u_int64_t r3 :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv2 :1;
|
|
u_int64_t op :4;
|
|
} I29;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t r1 :7;
|
|
u_int64_t resv7 :7;
|
|
u_int64_t r3 :7;
|
|
u_int64_t x :1;
|
|
u_int64_t hint :2;
|
|
u_int64_t x6 :6;
|
|
u_int64_t m :1;
|
|
u_int64_t op :4;
|
|
} M1;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t r1 :7;
|
|
u_int64_t r2 :7;
|
|
u_int64_t r3 :7;
|
|
u_int64_t x :1;
|
|
u_int64_t hint :2;
|
|
u_int64_t x6 :6;
|
|
u_int64_t m :1;
|
|
u_int64_t op :4;
|
|
} M2, M16;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t r1 :7;
|
|
u_int64_t imm7b :7;
|
|
u_int64_t r3 :7;
|
|
u_int64_t i :1;
|
|
u_int64_t hint :2;
|
|
u_int64_t x6 :6;
|
|
u_int64_t s :1;
|
|
u_int64_t op :4;
|
|
} M3;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t resv7 :7;
|
|
u_int64_t r2 :7;
|
|
u_int64_t r3 :7;
|
|
u_int64_t x :1;
|
|
u_int64_t hint :2;
|
|
u_int64_t x6 :6;
|
|
u_int64_t m :1;
|
|
u_int64_t op :4;
|
|
} M4;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t imm7a :7;
|
|
u_int64_t r2 :7;
|
|
u_int64_t r3 :7;
|
|
u_int64_t i :1;
|
|
u_int64_t hint :2;
|
|
u_int64_t x6 :6;
|
|
u_int64_t s :1;
|
|
u_int64_t op :4;
|
|
} M5;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t f1 :7;
|
|
u_int64_t resv7 :7;
|
|
u_int64_t r3 :7;
|
|
u_int64_t x :1;
|
|
u_int64_t hint :2;
|
|
u_int64_t x6 :6;
|
|
u_int64_t m :1;
|
|
u_int64_t op :4;
|
|
} M6;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t f1 :7;
|
|
u_int64_t r2 :7;
|
|
u_int64_t r3 :7;
|
|
u_int64_t x :1;
|
|
u_int64_t hint :2;
|
|
u_int64_t x6 :6;
|
|
u_int64_t m :1;
|
|
u_int64_t op :4;
|
|
} M7;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t f1 :7;
|
|
u_int64_t imm7b :7;
|
|
u_int64_t r3 :7;
|
|
u_int64_t i :1;
|
|
u_int64_t hint :2;
|
|
u_int64_t x6 :6;
|
|
u_int64_t s :1;
|
|
u_int64_t op :4;
|
|
} M8;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t resv7 :7;
|
|
u_int64_t f2 :7;
|
|
u_int64_t r3 :7;
|
|
u_int64_t x :1;
|
|
u_int64_t hint :2;
|
|
u_int64_t x6 :6;
|
|
u_int64_t m :1;
|
|
u_int64_t op :4;
|
|
} M9;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t imm7a :7;
|
|
u_int64_t f2 :7;
|
|
u_int64_t r3 :7;
|
|
u_int64_t i :1;
|
|
u_int64_t hint :2;
|
|
u_int64_t x6 :6;
|
|
u_int64_t s :1;
|
|
u_int64_t op :4;
|
|
} M10;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t f1 :7;
|
|
u_int64_t f2 :7;
|
|
u_int64_t r3 :7;
|
|
u_int64_t x :1;
|
|
u_int64_t hint :2;
|
|
u_int64_t x6 :6;
|
|
u_int64_t m :1;
|
|
u_int64_t op :4;
|
|
} M11, M12;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t resv14 :14;
|
|
u_int64_t r3 :7;
|
|
u_int64_t x :1;
|
|
u_int64_t hint :2;
|
|
u_int64_t x6 :6;
|
|
u_int64_t m :1;
|
|
u_int64_t op :4;
|
|
} M13;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t resv7 :7;
|
|
u_int64_t r2 :7;
|
|
u_int64_t r3 :7;
|
|
u_int64_t x :1;
|
|
u_int64_t hint :2;
|
|
u_int64_t x6 :6;
|
|
u_int64_t m :1;
|
|
u_int64_t op :4;
|
|
} M14;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t resv7 :7;
|
|
u_int64_t imm7b :7;
|
|
u_int64_t r3 :7;
|
|
u_int64_t i :1;
|
|
u_int64_t hint :2;
|
|
u_int64_t x6 :6;
|
|
u_int64_t s :1;
|
|
u_int64_t op :4;
|
|
} M15;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t r1 :7;
|
|
u_int64_t i2b :2;
|
|
u_int64_t s :1;
|
|
u_int64_t resv4 :4;
|
|
u_int64_t r3 :7;
|
|
u_int64_t x :1;
|
|
u_int64_t hint :2;
|
|
u_int64_t x6 :6;
|
|
u_int64_t m :1;
|
|
u_int64_t op :4;
|
|
} M17;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t f1 :7;
|
|
u_int64_t r2 :7;
|
|
u_int64_t resv7 :7;
|
|
u_int64_t x :1;
|
|
u_int64_t resv2 :2;
|
|
u_int64_t x6 :6;
|
|
u_int64_t m :1;
|
|
u_int64_t op :4;
|
|
} M18;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t r1 :7;
|
|
u_int64_t f2 :7;
|
|
u_int64_t resv7 :7;
|
|
u_int64_t x :1;
|
|
u_int64_t resv2 :2;
|
|
u_int64_t x6 :6;
|
|
u_int64_t m :1;
|
|
u_int64_t op :4;
|
|
} M19;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t imm7a :7;
|
|
u_int64_t r2 :7;
|
|
u_int64_t imm13c :13;
|
|
u_int64_t x3 :3;
|
|
u_int64_t s :1;
|
|
u_int64_t op :4;
|
|
} M20;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t imm7a :7;
|
|
u_int64_t f2 :7;
|
|
u_int64_t imm13c :13;
|
|
u_int64_t x3 :3;
|
|
u_int64_t s :1;
|
|
u_int64_t op :4;
|
|
} M21;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t r1 :7;
|
|
u_int64_t imm20b :20;
|
|
u_int64_t x3 :3;
|
|
u_int64_t s :1;
|
|
u_int64_t op :4;
|
|
} M22;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t f1 :7;
|
|
u_int64_t imm20b :20;
|
|
u_int64_t x3 :3;
|
|
u_int64_t s :1;
|
|
u_int64_t op :4;
|
|
} M23;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t resv21 :21;
|
|
u_int64_t x4 :4;
|
|
u_int64_t x2 :2;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} M24, M25;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t r1 :7;
|
|
u_int64_t resv14 :14;
|
|
u_int64_t x4 :4;
|
|
u_int64_t x2 :2;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} M26;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t f1 :7;
|
|
u_int64_t resv14 :14;
|
|
u_int64_t x4 :4;
|
|
u_int64_t x2 :2;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} M27;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t resv14 :14;
|
|
u_int64_t r3 :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} M28;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t resv7 :7;
|
|
u_int64_t r2 :7;
|
|
u_int64_t ar3 :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} M29;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t resv7 :7;
|
|
u_int64_t imm7b :7;
|
|
u_int64_t ar3 :7;
|
|
u_int64_t x4 :4;
|
|
u_int64_t x2 :2;
|
|
u_int64_t x3 :3;
|
|
u_int64_t s :1;
|
|
u_int64_t op :4;
|
|
} M30;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t r1 :7;
|
|
u_int64_t resv7 :7;
|
|
u_int64_t ar3 :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} M31;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t resv7 :7;
|
|
u_int64_t r2 :7;
|
|
u_int64_t cr3 :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} M32;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t r1 :7;
|
|
u_int64_t resv7 :7;
|
|
u_int64_t cr3 :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} M33;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t r1 :7;
|
|
u_int64_t sof :7;
|
|
u_int64_t sol :7;
|
|
u_int64_t sor :4;
|
|
u_int64_t resv2 :2;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} M34;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t resv7a :7;
|
|
u_int64_t r2 :7;
|
|
u_int64_t resv7b :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} M35;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t r1 :7;
|
|
u_int64_t resv14 :14;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} M36;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t imm20a :20;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t x4 :4;
|
|
u_int64_t x2 :2;
|
|
u_int64_t x3 :3;
|
|
u_int64_t i :1;
|
|
u_int64_t op :4;
|
|
} M37;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t r1 :7;
|
|
u_int64_t r2 :7;
|
|
u_int64_t r3 :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} M38;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t r1 :7;
|
|
u_int64_t i2b :2;
|
|
u_int64_t resv5 :5;
|
|
u_int64_t r3 :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} M39;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t resv7 :7;
|
|
u_int64_t i2b :2;
|
|
u_int64_t resv5 :5;
|
|
u_int64_t r3 :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} M40;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t resv7a :7;
|
|
u_int64_t r2 :7;
|
|
u_int64_t resv7b :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} M41;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t resv7 :7;
|
|
u_int64_t r2 :7;
|
|
u_int64_t r3 :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} M42, M45;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t r1 :7;
|
|
u_int64_t resv7 :7;
|
|
u_int64_t r3 :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} M43, M46;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t imm21a :21;
|
|
u_int64_t x4 :4;
|
|
u_int64_t i2d :2;
|
|
u_int64_t x3 :3;
|
|
u_int64_t i :1;
|
|
u_int64_t op :4;
|
|
} M44;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t btype :3;
|
|
u_int64_t resv3 :3;
|
|
u_int64_t p :1;
|
|
u_int64_t imm20b :20;
|
|
u_int64_t wh :2;
|
|
u_int64_t d :1;
|
|
u_int64_t s :1;
|
|
u_int64_t op :4;
|
|
} B1, B2;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t b1 :3;
|
|
u_int64_t resv3 :3;
|
|
u_int64_t p :1;
|
|
u_int64_t imm20b :20;
|
|
u_int64_t wh :2;
|
|
u_int64_t d :1;
|
|
u_int64_t s :1;
|
|
u_int64_t op :4;
|
|
} B3;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t btype :3;
|
|
u_int64_t resv3 :3;
|
|
u_int64_t p :1;
|
|
u_int64_t b2 :3;
|
|
u_int64_t resv11 :11;
|
|
u_int64_t x6 :6;
|
|
u_int64_t wh :2;
|
|
u_int64_t d :1;
|
|
u_int64_t s :1;
|
|
u_int64_t op :4;
|
|
} B4;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t b1 :3;
|
|
u_int64_t resv3 :3;
|
|
u_int64_t p :1;
|
|
u_int64_t b2 :3;
|
|
u_int64_t resv17 :17;
|
|
u_int64_t wh :2;
|
|
u_int64_t d :1;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} B5;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t wh :3;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t timm7a :7;
|
|
u_int64_t imm20b :20;
|
|
u_int64_t t2e :2;
|
|
u_int64_t ih :1;
|
|
u_int64_t s :1;
|
|
u_int64_t op :4;
|
|
} B6;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t wh :3;
|
|
u_int64_t resv1a :1;
|
|
u_int64_t timm7a :7;
|
|
u_int64_t b2 :3;
|
|
u_int64_t resv11 :11;
|
|
u_int64_t x6 :6;
|
|
u_int64_t t2e :2;
|
|
u_int64_t ih :1;
|
|
u_int64_t resv1b :1;
|
|
u_int64_t op :4;
|
|
} B7;
|
|
struct {
|
|
u_int64_t zero :6;
|
|
u_int64_t resv21 :21;
|
|
u_int64_t x6 :6;
|
|
u_int64_t resv4 :4;
|
|
u_int64_t op :4;
|
|
} B8;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t imm20a :20;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t x6 :6;
|
|
u_int64_t resv3 :3;
|
|
u_int64_t i :1;
|
|
u_int64_t op :4;
|
|
} B9;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t f1 :7;
|
|
u_int64_t f2 :7;
|
|
u_int64_t f3 :7;
|
|
u_int64_t f4 :7;
|
|
u_int64_t sf :2;
|
|
u_int64_t x :1;
|
|
u_int64_t op :4;
|
|
} F1;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t f1 :7;
|
|
u_int64_t f2 :7;
|
|
u_int64_t f3 :7;
|
|
u_int64_t f4 :7;
|
|
u_int64_t x2 :2;
|
|
u_int64_t x :1;
|
|
u_int64_t op :4;
|
|
} F2;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t f1 :7;
|
|
u_int64_t f2 :7;
|
|
u_int64_t f3 :7;
|
|
u_int64_t f4 :7;
|
|
u_int64_t resv2 :2;
|
|
u_int64_t x :1;
|
|
u_int64_t op :4;
|
|
} F3;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t p1 :6;
|
|
u_int64_t ta :1;
|
|
u_int64_t f2 :7;
|
|
u_int64_t f3 :7;
|
|
u_int64_t p2 :6;
|
|
u_int64_t ra :1;
|
|
u_int64_t sf :2;
|
|
u_int64_t rb :1;
|
|
u_int64_t op :4;
|
|
} F4;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t p1 :6;
|
|
u_int64_t ta :1;
|
|
u_int64_t f2 :7;
|
|
u_int64_t fclass7c:7;
|
|
u_int64_t p2 :6;
|
|
u_int64_t fc2 :2;
|
|
u_int64_t resv2 :2;
|
|
u_int64_t op :4;
|
|
} F5;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t f1 :7;
|
|
u_int64_t f2 :7;
|
|
u_int64_t f3 :7;
|
|
u_int64_t p2 :6;
|
|
u_int64_t x :1;
|
|
u_int64_t sf :2;
|
|
u_int64_t q :1;
|
|
u_int64_t op :4;
|
|
} F6;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t f1 :7;
|
|
u_int64_t resv7 :7;
|
|
u_int64_t f3 :7;
|
|
u_int64_t p2 :6;
|
|
u_int64_t x :1;
|
|
u_int64_t sf :2;
|
|
u_int64_t q :1;
|
|
u_int64_t op :4;
|
|
} F7;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t f1 :7;
|
|
u_int64_t f2 :7;
|
|
u_int64_t f3 :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x :1;
|
|
u_int64_t sf :2;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} F8;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t f1 :7;
|
|
u_int64_t f2 :7;
|
|
u_int64_t f3 :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x :1;
|
|
u_int64_t resv3 :3;
|
|
u_int64_t op :4;
|
|
} F9;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t f1 :7;
|
|
u_int64_t f2 :7;
|
|
u_int64_t resv7 :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x :1;
|
|
u_int64_t sf :2;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} F10;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t f1 :7;
|
|
u_int64_t f2 :7;
|
|
u_int64_t resv7 :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x :1;
|
|
u_int64_t resv3 :2;
|
|
u_int64_t op :4;
|
|
} F11;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t resv7 :7;
|
|
u_int64_t amask7b :7;
|
|
u_int64_t omask7c :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x :1;
|
|
u_int64_t sf :2;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} F12;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t resv21 :7;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x :1;
|
|
u_int64_t sf :2;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t op :4;
|
|
} F13;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t imm20a :20;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x :1;
|
|
u_int64_t sf :2;
|
|
u_int64_t s :1;
|
|
u_int64_t op :4;
|
|
} F14;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t imm20a :20;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x :1;
|
|
u_int64_t resv2 :2;
|
|
u_int64_t i :1;
|
|
u_int64_t op :4;
|
|
} F15;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t imm20a :20;
|
|
u_int64_t resv1 :1;
|
|
u_int64_t x6 :6;
|
|
u_int64_t x3 :3;
|
|
u_int64_t i :1;
|
|
u_int64_t op :4;
|
|
} X1;
|
|
struct {
|
|
u_int64_t qp :6;
|
|
u_int64_t r1 :7;
|
|
u_int64_t imm7b :7;
|
|
u_int64_t vc :1;
|
|
u_int64_t ic :1;
|
|
u_int64_t imm5c :5;
|
|
u_int64_t imm9d :9;
|
|
u_int64_t i :1;
|
|
u_int64_t op :4;
|
|
} X2;
|
|
u_int64_t ins;
|
|
};
|
|
|
|
#endif /* _MACHINE_INST_H_ */
|