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70 lines
3.1 KiB
C
70 lines
3.1 KiB
C
/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)psl.h 5.2 (Berkeley) 1/18/91
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* $Id: psl.h,v 1.4 1994/02/24 00:21:12 hsu Exp $
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*/
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#ifndef _MACHINE_PSL_H_
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#define _MACHINE_PSL_H_ 1
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/*
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* 386 processor status longword.
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*/
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#define PSL_C 0x00000001 /* carry bit */
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#define PSL_PF 0x00000004 /* parity bit */
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#define PSL_AF 0x00000010 /* bcd carry bit */
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#define PSL_Z 0x00000040 /* zero bit */
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#define PSL_N 0x00000080 /* negative bit */
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#define PSL_T 0x00000100 /* trace enable bit */
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#define PSL_I 0x00000200 /* interrupt enable bit */
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#define PSL_D 0x00000400 /* string instruction direction bit */
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#define PSL_V 0x00000800 /* overflow bit */
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#define PSL_IOPL 0x00003000 /* i/o priviledge level enable */
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#define PSL_NT 0x00004000 /* nested task bit */
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#define PSL_RF 0x00010000 /* restart flag bit */
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#define PSL_VM 0x00020000 /* virtual 8086 mode bit */
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#define PSL_AC 0x00040000 /* alignment checking */
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#define PSL_VIF 0x00080000 /* virtual interrupt enable */
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#define PSL_VIP 0x00100000 /* virtual interrupt pending */
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#define PSL_ID 0x00200000 /* identification bit */
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#define PSL_MBZ 0xffc08028 /* must be zero bits */
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#define PSL_MBO 0x00000002 /* must be one bits */
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#define PSL_USERSET (PSL_MBO | PSL_I)
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#define PSL_USERCLR (PSL_MBZ | PSL_NT)
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#endif /* _MACHINE_PSL_H_ */
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