This is a FEA program used in a classic FEM book. A complete (commercial)
version is available here:
<http://www.ce.berkeley.edu/~rlt/feap/>
The "personal version" is very limited, but it keeps the same format as
the complete (commercial) version and cad/netgen can produce files for it.
PR: ports/95210
Submitted by: Pedro F. Giffuni <giffunip (at) asme.org>
partitioning, static mapping, and sparse matrix block ordering.
Its purpose of Scotch is to apply graph theory, with a divide and conquer
approach, to scientific computing problems such as graph and mesh partitioning,
static mapping, and sparse matrix ordering, in application domains ranging from
structural mechanics to operating systems or bio-chemistry.
Note: there is an older tarball included in Aster's distfile, but I prefer
a separate distfile from the official site.
GPL Cver is a full 1995 P1364 Verilog standard HDL simulator.
It also implements some of the 2001 P1364 standard features
including all three PLI interfaces (tf_, acc_ and vpi_) as
defined in the 2001 Language Reference Manual (LRM).
Verilog is the name for both a language for describing
electronic hardware called a hardware description language
(HDL) and the name of the program that simulates HDL circuit
descriptions to verify that described circuits will function
correctly when the are constructed. Verilog is used only
for describing digital logic circuits. Other HDLs such as
Spice are used for describing analog circuits. There is an
IEEE standard named P1364 that standardizes the Verilog HDL
and the behavior of Verilog simulators. Verilog is officially
defined in the IEEE P1364 Language Reference Manual (LRM)
that can be purchased from IEEE. There are many good books
for learning that teach the Verilog HDL and/or that teach
digital circuit design using Verilog.
WWW: http://www.pragmatic-c.com/gpl-cver/
PR: ports/80968
Submitted by: Ying-Chieh Liao <ijliao@csie.nctu.edu.tw>
diagrams and printed circuit board artwork.
Kicad is a set of four softwares and a project manager:
* Eeschema: Schematic entry.
* Pcbnew: Board editor.
* Gerbview: GERBER viewer (photoplotter documents).
* Cvpcb: footprint selector for components used in the circuit design.
* Kicad: project manager.
portable libraries for VLSI design. It includes a VHDL compiler
and simulator, logic synthesis tools, automatic place and route
tools, and portable CMOS libraries.
Approved by: linimon (mentor)
tochnog is a free finite element program with many features which is
distributed under GPL. TOCHNOG accepts free format input.
Boundary conditions can be imposed at geometrical entities,
as well as nodes and elements.
PR: 52088
Submitted by: Pedro F. Giffuni <giffunip@yahoo.com>
A free CAD system and high level development tool for
Engineering. It's a very interesting port for some branches
of engineering.
PR: ports/52202
Submitted by: Pedro F. Giffuni <giffunip@yahoo.com>
Gwave is a waveform viewer. Its purpose is for viewing
analog data, such as the output from Spice-like simulations.
PR: ports/39364
Submitted by: Duncan Barclay <dmlb@dmlb.org>
