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mirror of https://git.FreeBSD.org/ports.git synced 2024-12-19 03:52:17 +00:00
freebsd-ports/cad
Kevin Lo 634fd57ed1 Update to version 2.2.1
PR: 25074
Submitted by: Ports Fury
2001-02-14 12:41:38 +00:00
..
acs Upgrade to 0.28. 2000-12-15 12:15:37 +00:00
chipmunk update with the new PORTNAME/PORTVERSION variables 2000-04-08 23:24:42 +00:00
cider - Prevent possible buffer overflow 2000-10-28 16:13:06 +00:00
electric Massive style enforcement - use ^I instead of spaces for variables identation. 2001-01-16 17:33:20 +00:00
felt Use ${XAWVER} for Xaw3d's shlib version number in LIB_DEPENDS so these ports 2000-09-05 18:34:52 +00:00
geda Implement USE_GTK, part 1. 2000-10-05 06:36:23 +00:00
irsim Update to 9.4 and update homepage 2001-02-13 13:30:17 +00:00
iverilog add iverilog, a Verilog simulation and synthesis tool 2001-02-13 11:02:15 +00:00
kaskade Massive style enforcement - use ^I instead of spaces for variables identation. 2001-01-16 17:33:20 +00:00
magic Update to version 6.5.1 and homepage 2001-02-13 13:25:26 +00:00
mars Massive style enforcement - use ^I instead of spaces for variables identation. 2001-01-16 17:33:20 +00:00
pcb fix X manpage error with XFree86-4 2001-01-09 19:35:23 +00:00
pisces Better handling for the imake dependency when XFREE86_VERSION != 3. The 2000-11-08 22:55:29 +00:00
pkg
qcad Add missing @dirrm. 2000-11-17 14:45:46 +00:00
qcad2 Add missing @dirrm. 2000-11-17 14:45:46 +00:00
sceptre SCEPTRE (System for Circuit Evaluation and Prediction of Transient 2001-02-11 06:58:11 +00:00
sis typo clean up police: \s -> \t 2001-02-14 05:43:00 +00:00
spice typo clean up police: \s -> \t 2001-02-14 05:43:00 +00:00
tkgate Update to version 1.6e 2000-11-18 15:46:14 +00:00
xcircuit Update to version 2.2.1 2001-02-14 12:41:38 +00:00
Makefile add iverilog, a Verilog simulation and synthesis tool 2001-02-13 11:02:15 +00:00