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https://git.FreeBSD.org/src.git
synced 2024-12-20 11:11:24 +00:00
Cleanup physical address and PTE types on MIPS.
1. Use vm_paddr_t for physical addresses. There are a few places in the MIPS platform code where vm_offset_t is used for physical addresses, change these to use vm_paddr_t: - phys_avail[], physmem_desc[] arrays - pmap_mapdev(), page_is_managed(), is_cacheable_mem() pmap_map() args - local variables of various pmap functions 2. Change init_pte_prot() return from int to pt_entry_t, as this can be 64 bit when using 64 bit TLB entries. 3. Update printing of pt_entry_t and of vm_paddr_t to use 'j' format with uintmax_t. This will be useful later if we plan to use 64bit phsical addr on 32 bit n32 compilation. Reviewed by: imp
This commit is contained in:
parent
9bd2cc2be5
commit
0dd873372a
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=217345
@ -54,7 +54,7 @@ void cpu_swapin(struct proc *);
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uintptr_t MipsEmulateBranch(struct trapframe *, uintptr_t, int, uintptr_t);
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void MipsSwitchFPState(struct thread *, struct trapframe *);
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u_long kvtop(void *addr);
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int is_cacheable_mem(vm_offset_t addr);
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int is_cacheable_mem(vm_paddr_t addr);
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void mips_generic_reset(void);
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#define MIPS_DEBUG 0
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@ -138,8 +138,8 @@ typedef struct pv_entry {
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* regions.
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*/
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#define PHYS_AVAIL_ENTRIES 10
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extern vm_offset_t phys_avail[PHYS_AVAIL_ENTRIES + 2];
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extern vm_offset_t physmem_desc[PHYS_AVAIL_ENTRIES + 2];
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extern vm_paddr_t phys_avail[PHYS_AVAIL_ENTRIES + 2];
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extern vm_paddr_t physmem_desc[PHYS_AVAIL_ENTRIES + 2];
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extern vm_offset_t virtual_avail;
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extern vm_offset_t virtual_end;
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@ -151,10 +151,10 @@ extern vm_paddr_t dump_avail[PHYS_AVAIL_ENTRIES + 2];
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#define pmap_page_set_memattr(m, ma) (void)0
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void pmap_bootstrap(void);
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void *pmap_mapdev(vm_offset_t, vm_size_t);
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void *pmap_mapdev(vm_paddr_t, vm_size_t);
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void pmap_unmapdev(vm_offset_t, vm_size_t);
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vm_offset_t pmap_steal_memory(vm_size_t size);
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int page_is_managed(vm_offset_t pa);
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int page_is_managed(vm_paddr_t pa);
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void pmap_kenter(vm_offset_t va, vm_paddr_t pa);
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void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int attr);
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void pmap_kremove(vm_offset_t va);
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@ -136,8 +136,8 @@ char pcpu_space[MAXCPU][PAGE_SIZE * 2] \
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struct pcpu *pcpup = (struct pcpu *)pcpu_space;
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vm_offset_t phys_avail[PHYS_AVAIL_ENTRIES + 2];
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vm_offset_t physmem_desc[PHYS_AVAIL_ENTRIES + 2];
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vm_paddr_t phys_avail[PHYS_AVAIL_ENTRIES + 2];
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vm_paddr_t physmem_desc[PHYS_AVAIL_ENTRIES + 2];
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vm_paddr_t dump_avail[PHYS_AVAIL_ENTRIES + 2];
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#ifdef UNIMPLEMENTED
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@ -509,12 +509,12 @@ cpu_idle_wakeup(int cpu)
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}
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int
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is_cacheable_mem(vm_offset_t addr)
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is_cacheable_mem(vm_paddr_t pa)
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{
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int i;
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for (i = 0; physmem_desc[i + 1] != 0; i += 2) {
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if (addr >= physmem_desc[i] && addr < physmem_desc[i + 1])
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if (pa >= physmem_desc[i] && pa < physmem_desc[i + 1])
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return (1);
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}
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@ -119,12 +119,6 @@ __FBSDID("$FreeBSD$");
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/*
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* Get PDEs and PTEs for user/kernel address space
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*
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* XXX The & for pmap_segshift() is wrong, as is the fact that it doesn't
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* trim off gratuitous bits of the address space. By having the &
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* there, we break defining NUSERPGTBLS below because the address space
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* is defined such that it ends immediately after NPDEPG*NPTEPG*PAGE_SIZE,
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* so we end up getting NUSERPGTBLS of 0.
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*/
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#define pmap_seg_index(v) (((v) >> SEGSHIFT) & (NPDEPG - 1))
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#define pmap_pde_index(v) (((v) >> PDRSHIFT) & (NPDEPG - 1))
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@ -184,7 +178,7 @@ static int _pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m);
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static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags);
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static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags);
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static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t);
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static int init_pte_prot(vm_offset_t va, vm_page_t m, vm_prot_t prot);
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static pt_entry_t init_pte_prot(vm_offset_t va, vm_page_t m, vm_prot_t prot);
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#ifdef SMP
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static void pmap_invalidate_page_action(void *arg);
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@ -888,7 +882,7 @@ pmap_kremove(vm_offset_t va)
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* Use XKPHYS for 64 bit, and KSEG0 where possible for 32 bit.
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*/
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vm_offset_t
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pmap_map(vm_offset_t *virt, vm_offset_t start, vm_offset_t end, int prot)
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pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
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{
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vm_offset_t va, sva;
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@ -1562,7 +1556,7 @@ pmap_remove_pte(struct pmap *pmap, pt_entry_t *ptq, vm_offset_t va)
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{
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pt_entry_t oldpte;
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vm_page_t m;
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vm_offset_t pa;
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vm_paddr_t pa;
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mtx_assert(&vm_page_queue_mtx, MA_OWNED);
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PMAP_LOCK_ASSERT(pmap, MA_OWNED);
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@ -1583,8 +1577,8 @@ pmap_remove_pte(struct pmap *pmap, pt_entry_t *ptq, vm_offset_t va)
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m = PHYS_TO_VM_PAGE(pa);
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if (pte_test(&oldpte, PTE_D)) {
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KASSERT(!pte_test(&oldpte, PTE_RO),
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("%s: modified page not writable: va: %p, pte: 0x%x",
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__func__, (void *)va, oldpte));
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("%s: modified page not writable: va: %p, pte: %#jx",
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__func__, (void *)va, (uintmax_t)oldpte));
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vm_page_dirty(m);
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}
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if (m->md.pv_flags & PV_TABLE_REF)
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@ -1742,8 +1736,8 @@ pmap_remove_all(vm_page_t m)
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*/
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if (pte_test(&tpte, PTE_D)) {
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KASSERT(!pte_test(&tpte, PTE_RO),
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("%s: modified page not writable: va: %p, pte: 0x%x",
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__func__, (void *)pv->pv_va, tpte));
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("%s: modified page not writable: va: %p, pte: %#jx",
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__func__, (void *)pv->pv_va, (uintmax_t)tpte));
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vm_page_dirty(m);
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}
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pmap_invalidate_page(pv->pv_pmap, pv->pv_va);
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@ -1850,12 +1844,12 @@ void
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pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
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vm_prot_t prot, boolean_t wired)
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{
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vm_offset_t pa, opa;
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vm_paddr_t pa, opa;
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pt_entry_t *pte;
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pt_entry_t origpte, newpte;
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pv_entry_t pv;
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vm_page_t mpte, om;
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int rw = 0;
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pt_entry_t rw = 0;
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if (pmap == NULL)
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return;
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@ -1908,8 +1902,8 @@ pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
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pmap->pm_stats.wired_count--;
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KASSERT(!pte_test(&origpte, PTE_D | PTE_RO),
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("%s: modified page not writable: va: %p, pte: 0x%x",
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__func__, (void *)va, origpte));
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("%s: modified page not writable: va: %p, pte: %#jx",
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__func__, (void *)va, (uintmax_t)origpte));
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/*
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* Remove extra pte reference
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@ -2011,7 +2005,7 @@ pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
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if (pte_test(&origpte, PTE_D)) {
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KASSERT(!pte_test(&origpte, PTE_RO),
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("pmap_enter: modified page not writable:"
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" va: %p, pte: 0x%x", (void *)va, origpte));
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" va: %p, pte: %#jx", (void *)va, (uintmax_t)origpte));
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if (page_is_managed(opa))
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vm_page_dirty(om);
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}
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@ -2063,7 +2057,7 @@ pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
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vm_prot_t prot, vm_page_t mpte)
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{
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pt_entry_t *pte;
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vm_offset_t pa;
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vm_paddr_t pa;
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KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
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(m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0,
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@ -2519,7 +2513,7 @@ pmap_remove_pages(pmap_t pmap)
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m = PHYS_TO_VM_PAGE(TLBLO_PTE_TO_PA(tpte));
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KASSERT(m != NULL,
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("pmap_remove_pages: bad tpte %x", tpte));
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("pmap_remove_pages: bad tpte %#jx", (uintmax_t)tpte));
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pv->pv_pmap->pm_stats.resident_count--;
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@ -2848,7 +2842,7 @@ pmap_clear_reference(vm_page_t m)
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* Use XKPHYS uncached for 64 bit, and KSEG1 where possible for 32 bit.
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*/
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void *
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pmap_mapdev(vm_offset_t pa, vm_size_t size)
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pmap_mapdev(vm_paddr_t pa, vm_size_t size)
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{
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vm_offset_t va, tmpva, offset;
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@ -2903,7 +2897,7 @@ int
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pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
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{
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pt_entry_t *ptep, pte;
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vm_offset_t pa;
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vm_paddr_t pa;
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vm_page_t m;
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int val;
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boolean_t managed;
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@ -3066,8 +3060,8 @@ DB_SHOW_COMMAND(ptable, ddb_pid_dump)
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continue;
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pa = TLBLO_PTE_TO_PA(pte);
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va = ((u_long)i << SEGSHIFT) | (j << PDRSHIFT) | (k << PAGE_SHIFT);
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db_printf("\t\t[%04d] va: %p pte: %8x pa:%lx\n",
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k, (void *)va, pte, (u_long)pa);
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db_printf("\t\t[%04d] va: %p pte: %8jx pa:%jx\n",
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k, (void *)va, (uintmax_t)pte, (uintmax_t)pa);
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}
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}
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}
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@ -3155,7 +3149,7 @@ pmap_asid_alloc(pmap)
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}
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int
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page_is_managed(vm_offset_t pa)
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page_is_managed(vm_paddr_t pa)
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{
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vm_offset_t pgnum = mips_btop(pa);
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@ -3171,10 +3165,10 @@ page_is_managed(vm_offset_t pa)
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return (0);
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}
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static int
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static pt_entry_t
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init_pte_prot(vm_offset_t va, vm_page_t m, vm_prot_t prot)
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{
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int rw;
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pt_entry_t rw;
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if (!(prot & VM_PROT_WRITE))
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rw = PTE_V | PTE_RO | PTE_C_CACHE;
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@ -3203,7 +3197,7 @@ pmap_emulate_modified(pmap_t pmap, vm_offset_t va)
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{
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vm_page_t m;
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pt_entry_t *pte;
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vm_offset_t pa;
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vm_paddr_t pa;
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PMAP_LOCK(pmap);
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pte = pmap_pte(pmap, va);
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@ -1276,8 +1276,8 @@ log_illegal_instruction(const char *msg, struct trapframe *frame)
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if (!(pc & 3) &&
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useracc((caddr_t)(intptr_t)pc, sizeof(int) * 4, VM_PROT_READ)) {
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/* dump page table entry for faulting instruction */
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log(LOG_ERR, "Page table info for pc address %#jx: pde = %p, pte = %#x\n",
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(intmax_t)pc, (void *)(intptr_t)*pdep, ptep ? *ptep : 0);
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log(LOG_ERR, "Page table info for pc address %#jx: pde = %p, pte = %#jx\n",
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(intmax_t)pc, (void *)(intptr_t)*pdep, (uintmax_t)(ptep ? *ptep : 0));
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addr = (unsigned int *)(intptr_t)pc;
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log(LOG_ERR, "Dumping 4 words starting at pc address %p: \n",
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@ -1285,8 +1285,8 @@ log_illegal_instruction(const char *msg, struct trapframe *frame)
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log(LOG_ERR, "%08x %08x %08x %08x\n",
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addr[0], addr[1], addr[2], addr[3]);
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} else {
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log(LOG_ERR, "pc address %#jx is inaccessible, pde = %p, pte = %#x\n",
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(intmax_t)pc, (void *)(intptr_t)*pdep, ptep ? *ptep : 0);
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log(LOG_ERR, "pc address %#jx is inaccessible, pde = %p, pte = %#jx\n",
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(intmax_t)pc, (void *)(intptr_t)*pdep, (uintmax_t)(ptep ? *ptep : 0));
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}
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}
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@ -1340,8 +1340,8 @@ log_bad_page_fault(char *msg, struct trapframe *frame, int trap_type)
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(trap_type != T_BUS_ERR_IFETCH) &&
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useracc((caddr_t)(intptr_t)pc, sizeof(int) * 4, VM_PROT_READ)) {
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/* dump page table entry for faulting instruction */
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log(LOG_ERR, "Page table info for pc address %#jx: pde = %p, pte = %#x\n",
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(intmax_t)pc, (void *)(intptr_t)*pdep, ptep ? *ptep : 0);
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log(LOG_ERR, "Page table info for pc address %#jx: pde = %p, pte = %#jx\n",
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(intmax_t)pc, (void *)(intptr_t)*pdep, (uintmax_t)(ptep ? *ptep : 0));
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addr = (unsigned int *)(intptr_t)pc;
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log(LOG_ERR, "Dumping 4 words starting at pc address %p: \n",
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@ -1349,13 +1349,13 @@ log_bad_page_fault(char *msg, struct trapframe *frame, int trap_type)
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log(LOG_ERR, "%08x %08x %08x %08x\n",
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addr[0], addr[1], addr[2], addr[3]);
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} else {
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log(LOG_ERR, "pc address %#jx is inaccessible, pde = %p, pte = %#x\n",
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(intmax_t)pc, (void *)(intptr_t)*pdep, ptep ? *ptep : 0);
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log(LOG_ERR, "pc address %#jx is inaccessible, pde = %p, pte = %#jx\n",
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(intmax_t)pc, (void *)(intptr_t)*pdep, (uintmax_t)(ptep ? *ptep : 0));
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}
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get_mapping_info((vm_offset_t)frame->badvaddr, &pdep, &ptep);
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log(LOG_ERR, "Page table info for bad address %#jx: pde = %p, pte = %#x\n",
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(intmax_t)frame->badvaddr, (void *)(intptr_t)*pdep, ptep ? *ptep : 0);
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log(LOG_ERR, "Page table info for bad address %#jx: pde = %p, pte = %#jx\n",
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(intmax_t)frame->badvaddr, (void *)(intptr_t)*pdep, (uintmax_t)(ptep ? *ptep : 0));
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}
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