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(1) Use uintptr_t in preference to unsigned. The latter isn't right for
64-bit case, while the former is. (2) include a SB1 specific coherency mapping Submitted by: Neelkanth Nath (2)
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/projects/mips/; revision=195355
@ -56,21 +56,21 @@
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#define MIPS_RESERVED_ADDR 0xbfc80000
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#define MIPS_RESERVED_ADDR 0xbfc80000
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#define MIPS_KSEG0_LARGEST_PHYS 0x20000000
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#define MIPS_KSEG0_LARGEST_PHYS 0x20000000
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#define MIPS_CACHED_TO_PHYS(x) ((unsigned)(x) & 0x1fffffff)
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#define MIPS_CACHED_TO_PHYS(x) ((uintptr_t)(x) & 0x1fffffff)
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#define MIPS_PHYS_TO_CACHED(x) ((unsigned)(x) | MIPS_CACHED_MEMORY_ADDR)
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#define MIPS_PHYS_TO_CACHED(x) ((uintptr_t)(x) | MIPS_CACHED_MEMORY_ADDR)
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#define MIPS_UNCACHED_TO_PHYS(x) ((unsigned)(x) & 0x1fffffff)
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#define MIPS_UNCACHED_TO_PHYS(x) ((uintptr_t)(x) & 0x1fffffff)
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#define MIPS_PHYS_TO_UNCACHED(x) ((unsigned)(x) | MIPS_UNCACHED_MEMORY_ADDR)
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#define MIPS_PHYS_TO_UNCACHED(x) ((uintptr_t)(x) | MIPS_UNCACHED_MEMORY_ADDR)
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#define MIPS_PHYS_MASK (0x1fffffff)
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#define MIPS_PHYS_MASK (0x1fffffff)
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#define MIPS_PA_2_K1VA(x) (MIPS_KSEG1_START | ((x) & MIPS_PHYS_MASK))
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#define MIPS_PA_2_K1VA(x) (MIPS_KSEG1_START | ((x) & MIPS_PHYS_MASK))
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#define MIPS_VA_TO_CINDEX(x) ((unsigned)(x) & 0xffffff | MIPS_CACHED_MEMORY_ADDR)
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#define MIPS_VA_TO_CINDEX(x) ((uintptr_t)(x) & 0xffffff | MIPS_CACHED_MEMORY_ADDR)
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#define MIPS_CACHED_TO_UNCACHED(x) (MIPS_PHYS_TO_UNCACHED(MIPS_CACHED_TO_PHYS(x)))
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#define MIPS_CACHED_TO_UNCACHED(x) (MIPS_PHYS_TO_UNCACHED(MIPS_CACHED_TO_PHYS(x)))
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#define MIPS_PHYS_TO_KSEG0(x) ((unsigned)(x) | MIPS_KSEG0_START)
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#define MIPS_PHYS_TO_KSEG0(x) ((uintptr_t)(x) | MIPS_KSEG0_START)
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#define MIPS_PHYS_TO_KSEG1(x) ((unsigned)(x) | MIPS_KSEG1_START)
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#define MIPS_PHYS_TO_KSEG1(x) ((uintptr_t)(x) | MIPS_KSEG1_START)
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#define MIPS_KSEG0_TO_PHYS(x) ((unsigned)(x) & MIPS_PHYS_MASK)
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#define MIPS_KSEG0_TO_PHYS(x) ((uintptr_t)(x) & MIPS_PHYS_MASK)
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#define MIPS_KSEG1_TO_PHYS(x) ((unsigned)(x) & MIPS_PHYS_MASK)
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#define MIPS_KSEG1_TO_PHYS(x) ((uintptr_t)(x) & MIPS_PHYS_MASK)
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#define MIPS_IS_KSEG0_ADDR(x) \
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#define MIPS_IS_KSEG0_ADDR(x) \
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(((vm_offset_t)(x) >= MIPS_KSEG0_START) && \
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(((vm_offset_t)(x) >= MIPS_KSEG0_START) && \
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@ -163,7 +163,11 @@
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* The bits in the CONFIG register
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* The bits in the CONFIG register
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*/
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*/
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#define CFG_K0_UNCACHED 2
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#define CFG_K0_UNCACHED 2
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#if defined(CPU_SB1)
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#define CFG_K0_COHERENT 5 /* cacheable coherent */
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#else
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#define CFG_K0_CACHED 3
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#define CFG_K0_CACHED 3
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#endif
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/*
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/*
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* The bits in the context register.
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* The bits in the context register.
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