instead of "puts" which prints whatever is at %si, followed by a CRLF.
It was not noticed during tests because at that point %si points
to a partition entry whose first byte is 0x80, which is both a
terminator for the string and a non printable character.
Submitted by: Christoph Mallon
boot code. The bug was introduced in rev.1.13, and went unnoticed
because FreeBSD's boot1 does not use it, but other systems might.
(I have been struggling for almost a full day trying to figure out
why a syslinux'ed partition would not boot when started with the
FreeBSD /boot/boot0, only to realize that the bug was ours!)
The space for the two extra bytes (push %si and pop %si) is reclaimed
by removing an extra CRLF that is printed before booting.
The bug is not a major one but if there is time it might be a good
thing to merge it into the upcoming releases.
above) exhibits some misbehaviours on machines with AMD64 CPUs,
which at least in some cases I have tracked down to a heap overflow.
It is unclear whether it depends on the CPU or on the pxe bios
itself which may use more memory on AMD machines.
Noticeably a pxeboot compiled from 6.x sources works fine on all
machines I have tried so far, while a pxeboot compiled from 7.x
sources does not.
This patch is a first step in reducing the amount of memory used
while processing the configuration files read by the loader at boot
(some of them are quite large, 1700+ lines), and it does so by:
+ moving a buffer to static memory instead of allocating in the heap;
+ skipping empty lines;
+ reducing the amount of memory used for line descriptors;
Unfortunately there are several changes between 6.x and above,
affecting the compiler, the loader code itself, and libstand,
and it is not so straightforward to
These changes fix the behaviour on one motherboard with a
single-core AMD cpu, but are still not enough e.g on an Asus
M2N-VM (with a dual-core CPU).
I need to investigate the problem a bit more before figuring
out what should be committed to RELENG_7
PR: kern/118222
- Only non-sliced bsdlabel style partitioning is currently supported (but provisions
are made towards GPT support, which should follow soon)
- Enable storage support in loader on ARM
Obtained from: Semihalf
to gptboot, i.e. installed in a freebsd-boot partition using /sbin/gpart or
/sbin/gpt.
Tweak the /boot/loader ZFS support so that it can find ZFS pools that are
contained in GPT partitions.
This bring huge amount of changes, I'll enumerate only user-visible changes:
- Delegated Administration
Allows regular users to perform ZFS operations, like file system
creation, snapshot creation, etc.
- L2ARC
Level 2 cache for ZFS - allows to use additional disks for cache.
Huge performance improvements mostly for random read of mostly
static content.
- slog
Allow to use additional disks for ZFS Intent Log to speed up
operations like fsync(2).
- vfs.zfs.super_owner
Allows regular users to perform privileged operations on files stored
on ZFS file systems owned by him. Very careful with this one.
- chflags(2)
Not all the flags are supported. This still needs work.
- ZFSBoot
Support to boot off of ZFS pool. Not finished, AFAIK.
Submitted by: dfr
- Snapshot properties
- New failure modes
Before if write requested failed, system paniced. Now one
can select from one of three failure modes:
- panic - panic on write error
- wait - wait for disk to reappear
- continue - serve read requests if possible, block write requests
- Refquota, refreservation properties
Just quota and reservation properties, but don't count space consumed
by children file systems, clones and snapshots.
- Sparse volumes
ZVOLs that don't reserve space in the pool.
- External attributes
Compatible with extattr(2).
- NFSv4-ACLs
Not sure about the status, might not be complete yet.
Submitted by: trasz
- Creation-time properties
- Regression tests for zpool(8) command.
Obtained from: OpenSolaris
controller. The controller is also known as L1E(AR8121) and
L2E(AR8113/AR8114). Unlike its predecessor Attansic L1,
AR8121/AR8113/AR8114 uses completely different Rx logic such that
it requires separate driver. Datasheet for AR81xx is not available
to open source driver writers but it shares large part of Tx and
PHY logic of L1. I still don't understand some part of register
meaning and some MAC statistics counters but the driver seems to
have no critical issues for performance and stability.
The AR81xx requires copy operation to pass received frames to upper
stack such that ale(4) consumes a lot of CPU cycles than that of
other controller. A couple of silicon bugs also adds more CPU
cycles to address the known hardware bug. However, if you have fast
CPU you can still saturate the link.
Currently ale(4) supports the following hardware features.
- MSI.
- TCP Segmentation offload.
- Hardware VLAN tag insertion/stripping with checksum offload.
- Tx TCP/UDP checksum offload and Rx IP/TCP/UDP checksum offload.
- Tx/Rx interrupt moderation.
- Hardware statistics counters.
- Jumbo frame.
- WOL.
AR81xx PCIe ethernet controllers are mainly found on ASUS EeePC or
P5Q series of ASUS motherboards. Special thanks to Jeremy Chadwick
who sent the hardware to me. Without his donation writing a driver
for AR81xx would never have been possible. Big thanks to all people
who reported feedback or tested patches.
HW donated by: koitsu
Tested by: bsam, Joao Barros <joao.barros <> gmail DOT com >
Jan Henrik Sylvester <me <> janh DOT de >
Ivan Brawley < ivan <> brawley DOT id DOT au >,
CURRENT ML
on G4 machines. On the assumption that most people using FreeBSD on Apple
hardware are not using serial consoles, set boot1's output to screen. This
should be revisited. While here, reduce verbosity of boot1.
This uses the common U-Boot support lib (sys/boot/uboot, already used on
FreeBSD/powerpc), and assumes the underlying firmware has the modern API for
stand-alone apps enabled in the config (CONFIG_API).
Only netbooting is supported at the moment.
Obtained from: Marvell, Semihalf
bring in FIXUP_BOOT_DRV functionality as an #ifdef. This is not
enabled at this time, and the md5 remains constant with this change.
Apart from the 'accept any partitioning scheme on the device' changes,
this was the biggest delta...
# and yes, we'll merge these into one source file if we can do that in a
# way that makes sense.
Obtained from: sys/boot/arm/ixp425/boot2/boot2.c
boot an amd64 kernel. If not, then fail the boot request with an error
message. Otherwise, the boot attempt will fail with a BTX fault when
trying to read the EFER MSR.
MFC after: 3 days
code. Added a copyright for the work I did to this file a couple of
years ago. Add John's copyright too, since I'm sure I'll be pulling
more into this code. This also implements a new -n option to not
allow breaking into the boot sequence which was original in the patch
John posted (not in the original i386 code I based this boot2.c on,
only the name is the same). I haven't checked to see if he did that,
or if it was one of Sam's improvements.
Submitted by: jhay@
- extend ub_dev_read() and ub_dev_recv() so that the actual len and
all error codes can be passed and processed properly; unify behaviour of
these routines
- introduce syscall general error code (API_ESYSC)
of "cd:,\\:tbxi" with properly configured boot.tbxi, instead of booting
\boot\loader directly. Rev 183168 could probably stay, since it can be
viewed as an anti-foot-shooting measure and has no impact on normal
operation. I can revert it as well, if anybody objects.
they point to the very same device. This should make loader usable on
some (all?) PowerMacs, where "/chosen/stdout" is disconneted from the
"screen" by the OF init process by default, except when user actually
has requested interaction with OF by holding ALT-CMD-O-F. Along with
rev 183168 this should provide a way to build bootable FreeBSD/ppc
installation or live CD that works OOB. Also, it should bring PowerMac
experience closer to that on other arches.
MFC after: 1 week
(assiming re@ blessing)
isn't fixed to only open the network device once and not do a open
and close dance on every file access; the firmwares of newer sparc64
machines perform an auto-negotiation with every open which in turn
causes netbooting to take horribly long if we open and close the
device over and over again.
the locked entry in it16 slot 0, which typically is occupied by the
PROM, and manually entering locked entries in slots != 0.
Thanks to Hubert Feyrer for donating the Blade 2000 this change was
developed on.
to synchronization needed after stores to internal ASIs in order
to make side-effects visible. This mainly requires the MEMBAR #Sync
after such stores to be replaced with a FLUSH. We use KERNBASE as
the address to FLUSH as it is guaranteed to not trap. Actually,
the USII synchronization rules also already require a FLUSH in
pretty much all of the cases changed.
We're also hitting an additional USIII synchronization rule which
requires stores to AA_IMMU_SFSR to be immediately followed by a DONE,
FLUSH or RETRY. Doing so triggers a RED state exception though so
leave the MEMBAR #Sync. Linux apparently also has gotten away with
doing the same for quite some time now, apart from the fact that
it's not clear to me why we need to clear the valid bit from the
SFSR in the first place.
Reviewed by: nwhitehorn
- add new diag commands: devinfo, sysinfo for U-Boot-style details about the system
configuration
- better memory info summary
- style corrections
Obtained from: Semihalf
Global data (pointed by R2 on PowerPC) in principle is not guaranteed to be in
proximity of U-Boot heap (where the API signature is placed) accross different
architectures and platforms. Instead, use U-Boot stack pointer as a hint for
the search instead of the global data; this method tends to be more uniform
accross different platforms.
Obtained from: Semihalf
errata of USIII and beyond (USIII erratum #19, USIII+ erratum #1,
USIIIi erratum #1).
- Use the cheetah PA mask in {d,i}tlb_va_to_pa_sun4u() for USIII
and beyond. This is done so that these functions will still mask
the debug bits of spitfire-class CPUs once we increase TD_PA_BITS
to match the number of bits used for the PA by cheetah-class CPUs.
- Change {d,i}tlb_enter_sun4u() to also set TLB_CTX_KERNEL as the
context of the mappings entered. This is more or less cosmetic as
TLB_CTX_KERNEL is 0.
- Now that we have to distinguish between different sun4u CPUs in
the loader anyway, no longer do trial and error when reading the
portid property.
set the %eflags used during a BIOS call via BTX to 0x202. Previously
the flags field was uninitialized garbage, and thus it was "random" if
interrupts were enabled or not during BIOS calls.
- Use constants from <machine/psl.h> for fields in %eflags.
MFC after: 3 days
- I had errantly assumed that all user requests should run with interrupts
enabled. User requests for software interrupts, however, need to disable
interrupts (and tracing) just like hardware interrupts.
- Disable alignment checking when emulating a hardware interrupt as well
(based on the description of the real mode operation of the 'INT'
instruction in the IA-32 manuals).
- Use constants for fields in %eflags.
Tested by: bz
MFC after: 3 days
no particular reason for them to be implemented in assembler and
having them in C allows easier extension as well as using more C
macros and {d,i}tlb_slot_max rather than hard-coding magic (and
actually spitfire-only) values.
- Fix the compilation of pmap_print_tte().
- Change pmap_print_tlb() to use ldxa() rather than re-rolling it
inline as well as TLB_DAR_SLOT and {d,i}tlb_slot_max rather than
hardcoding magic (and actually spitfire-only) values.
- While at it, suffix the above mentioned functions with "_sun4u" to
underline they're architecture-specific.
- Use __FBSDID and macros instead of magic values in locore.S.
- Remove unused includes and smp_stack in locore.S.
