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11392 Commits

Author SHA1 Message Date
Alexander Motin
a2302ba6a7 According to "Intel 64 and IA-32 Architectures Software Developer's Manual
Volume 3B: System Programming Guide, Part 2", CPUs with family 0x6 and model
above or 0xE and CPUs with family 0xF and model above or 0x3 have invariant
TSC.
2008-11-30 00:11:48 +00:00
Konstantin Belousov
74f5d68011 Make linux_sendmsg() and linux_recvmsg() work on linux32/amd64.
Change types used in the linux' struct msghdr and struct cmsghdr
definitions to the properly-sized architecture-specific types.
Move ancillary data handler from linux_sendit() to linux_sendmsg().

Submitted by:	dchagin
2008-11-29 17:14:06 +00:00
Joseph Koshy
0cfab8ddc1 - Add support for PMCs in Intel CPUs of Family 6, model 0xE (Core Solo
and Core Duo), models 0xF (Core2), model 0x17 (Core2Extreme) and
  model 0x1C (Atom).

  In these CPUs, the actual numbers, kinds and widths of PMCs present
  need to queried at run time.  Support for specific "architectural"
  events also needs to be queried at run time.

  Model 0xE CPUs support programmable PMCs, subsequent CPUs
  additionally support "fixed-function" counters.

- Use event names that are close to vendor documentation, taking in
  account that:
  - events with identical semantics on two or more CPUs in this family
    can have differing names in vendor documentation,
  - identical vendor event names may map to differing events across
    CPUs,
  - each type of CPU supports a different subset of measurable
    events.

  Fixed-function and programmable counters both use the same vendor
  names for events.  The use of a class name prefix ("iaf-" or
  "iap-" respectively) permits these to be distinguished.

- In libpmc, refactor pmc_name_of_event() into a public interface
  and an internal helper function, for use by log handling code.

- Minor code tweaks: staticize a global, freshen a few comments.

Tested by:	gnn
2008-11-27 09:00:47 +00:00
Jung-uk Kim
4f73c49054 Remove an unused variable.
Found with:	Coverity Prevent(tm)
CID:		3677
2008-11-26 22:33:55 +00:00
Jung-uk Kim
0eec8b9141 Use newly introduced cpu_vendor_id to make invariant TSC detection more
clearer and merge r185295 to amd64.
2008-11-26 19:29:33 +00:00
Jung-uk Kim
5113aa0af3 Introduce cpu_vendor_id and replace a lot of strcmp(cpu_vendor, "...").
Reviewed by:	jhb, peter (early amd64 version)
2008-11-26 19:25:13 +00:00
Maxim Sobolev
7a1940c4ad Add Pentium D cores into the list that can't handle 12.5% and 25%
throttle. My SMP kernel hangs when one of those is selected by
powerd. Errata AA21 here:

ftp://download.intel.com/design/PentiumXE/specupdt/31030717.pdf

MFC after:	2 weeks
2008-11-26 09:46:35 +00:00
Ganbold Tsagaankhuu
d2a1a92e3c Remove unused variable.
Found with:     Coverity Prevent(tm)
CID: 3685

Approved by: scottl
2008-11-25 18:48:13 +00:00
Takanori Watanabe
effde07141 Core i7 supports invaliant TSC and the presense is presented on
this CPUID information, according to recently updated AP485.
2008-11-25 13:35:06 +00:00
Konstantin Belousov
b4cf0e62f4 Add sv_flags field to struct sysentvec with intention to provide description
of the ABI of the currently executing image. Change some places to test
the flags instead of explicit comparing with address of known sysentvec
structures to determine ABI features.

Discussed with:	dchagin, imp, jhb, peter
2008-11-22 12:36:15 +00:00
Kip Macy
db7f0b974f - bump __FreeBSD version to reflect added buf_ring, memory barriers,
and ifnet functions

- add memory barriers to <machine/atomic.h>
- update drivers to only conditionally define their own

- add lockless producer / consumer ring buffer
- remove ring buffer implementation from cxgb and update its callers

- add if_transmit(struct ifnet *ifp, struct mbuf *m) to ifnet to
  allow drivers to efficiently manage multiple hardware queues
  (i.e. not serialize all packets through one ifq)
- expose if_qflush to allow drivers to flush any driver managed queues

This work was supported by Bitgravity Inc. and Chelsio Inc.
2008-11-22 05:55:56 +00:00
Konstantin Belousov
62162dfc94 In the robust futexes list head, futex_offset shall be signed,
and glibc actually supplies negative offsets. Change l_ulong to l_long.

Submitted by:	dchagin
2008-11-16 15:45:41 +00:00
Kip Macy
7baa58d9bd repair config file from spamming 2008-11-14 07:05:51 +00:00
Pyun YongHyeon
3c6e15bcee Add ale(4), a driver for Atheros AR8121/AR8113/AR8114 PCIe ethernet
controller. The controller is also known as L1E(AR8121) and
L2E(AR8113/AR8114). Unlike its predecessor Attansic L1,
AR8121/AR8113/AR8114 uses completely different Rx logic such that
it requires separate driver. Datasheet for AR81xx is not available
to open source driver writers but it shares large part of Tx and
PHY logic of L1. I still don't understand some part of register
meaning and some MAC statistics counters but the driver seems to
have no critical issues for performance and stability.

The AR81xx requires copy operation to pass received frames to upper
stack such that ale(4) consumes a lot of CPU cycles than that of
other controller. A couple of silicon bugs also adds more CPU
cycles to address the known hardware bug. However, if you have fast
CPU you can still saturate the link.
Currently ale(4) supports the following hardware features.
  - MSI.
  - TCP Segmentation offload.
  - Hardware VLAN tag insertion/stripping with checksum offload.
  - Tx TCP/UDP checksum offload and Rx IP/TCP/UDP checksum offload.
  - Tx/Rx interrupt moderation.
  - Hardware statistics counters.
  - Jumbo frame.
  - WOL.

AR81xx PCIe ethernet controllers are mainly found on ASUS EeePC or
P5Q series of ASUS motherboards. Special thanks to Jeremy Chadwick
who sent the hardware to me. Without his donation writing a driver
for AR81xx would never have been possible. Big thanks to all people
who reported feedback or tested patches.

HW donated by:	koitsu
Tested by:	bsam, Joao Barros <joao.barros <> gmail DOT com >
		Jan Henrik Sylvester <me <> janh DOT de >
		Ivan Brawley < ivan <> brawley DOT id DOT au >,
		CURRENT ML
2008-11-12 09:52:06 +00:00
Ed Schouten
ab0d10f68e Several cleanups related to pipe(2).
- Use `fildes[2]' instead of `*fildes' to make more clear that pipe(2)
  fills an array with two descriptors.

- Remove EFAULT from the manual page. Because of the current calling
  convention, pipe(2) raises a segmentation fault when an invalid
  address is passed.

- Introduce kern_pipe() to make it easier for binary emulations to
  implement pipe(2).

- Make Linux binary emulation use kern_pipe(), which means we don't have
  to recover td_retval after calling the FreeBSD system call.

Approved by:	rdivacky
Discussed on:	arch
2008-11-11 14:55:59 +00:00
Joseph Koshy
e829eb6d61 - Separate PMC class dependent code from other kinds of machine
dependencies.  A 'struct pmc_classdep' structure describes operations
  on PMCs; 'struct pmc_mdep' contains one or more 'struct pmc_classdep'
  structures depending on the CPU in question.

  Inside PMC class dependent code, row indices are relative to the
  PMCs supported by the PMC class; MI code in "hwpmc_mod.c" translates
  global row indices before invoking class dependent operations.

- Augment the OP_GETCPUINFO request with the number of PMCs present
  in a PMC class.

- Move code common to Intel CPUs to file "hwpmc_intel.c".

- Move TSC handling to file "hwpmc_tsc.c".
2008-11-09 17:37:54 +00:00
Ed Schouten
ebb45b0620 Regenerate system call tables for r184789. 2008-11-09 10:48:06 +00:00
Ed Schouten
a1b5a8955e Mark uname(), getdomainname() and setdomainname() with COMPAT_FREEBSD4.
Looking at our source code history, it seems the uname(),
getdomainname() and setdomainname() system calls got deprecated
somewhere after FreeBSD 1.1, but they have never been phased out
properly. Because we don't have a COMPAT_FREEBSD1, just use
COMPAT_FREEBSD4.

Also fix the Linuxolator to build without the setdomainname() routine by
just making it call userland_sysctl on kern.domainname. Also replace the
setdomainname()'s implementation to use this approach, because we're
duplicating code with sysctl_domainname().

I wasn't able to keep these three routines working in our
COMPAT_FREEBSD32, because that would require yet another keyword for
syscalls.master (COMPAT4+NOPROTO). Because this routine is probably
unused already, this won't be a problem in practice. If it turns out to
be a problem, we'll just restore this functionality.

Reviewed by:	rdivacky, kib
2008-11-09 10:45:13 +00:00
Scott Long
64c71632bf Move the CAM passthrough code into a true module so that it doesn't have to be
compiled into the main AMR driver.  It's code that is nice to have but not
required for normal operation, and it is reported to cause problems for some
people.
2008-11-03 00:53:54 +00:00
Warner Losh
132580b5af MFp4:
Make the ISA bus keep track of more PNP details.  Plus a minor style
fix while I'm here.  More could be done here, but except for some SBCs
that don't have ACPI, there's limited value to anybody in doing so.
2008-11-02 18:48:54 +00:00
Konstantin Belousov
d1237d3f72 The file was inadvertently excluded from r184499. 2008-10-31 10:14:28 +00:00
Konstantin Belousov
f5dfdb519f Revert r184136. Instead, push the check for crashdumpmap overflow into the
MD i386 and amd64 dump code.

Requested by:	jhb
Retested by:	pho
MFC after:	3 days (+ 176304 + 184136)
2008-10-31 10:11:35 +00:00
Warner Losh
0c3d9d1f6b style(9) nit: remove unnecessary {} pair. 2008-10-28 04:32:41 +00:00
Maxim Sobolev
a3f027fa56 Fix r184323 - set stathz to be the same as lapic_timer_hz when lapic_timer_hz
is less than 128. Remove extra {} to match existing style.
2008-10-27 21:06:16 +00:00
Maxim Sobolev
b7865f7912 Fix division by zero panic if kern.hz less than 32.
MFC after:	1 day
2008-10-26 18:58:04 +00:00
Kip Macy
e67fc8f258 only call hardclock on cpu0
pointed out by: Scott Long
2008-10-25 20:42:10 +00:00
Kip Macy
951f87e4ae handle case where eflags represents actual flags value when
restoring interrupts
2008-10-25 04:46:02 +00:00
Kip Macy
1f5aa99363 Fix general issues with IPI support 2008-10-24 07:58:38 +00:00
Nick Hibma
c781627992 Remove the entry from the i386 specific NOTES as it is in the generic
NOTES file as well. This avoids one of the warnings from

	make LINT && config LINT
2008-10-24 07:12:05 +00:00
Dag-Erling Smørgrav
1ede983cc9 Retire the MALLOC and FREE macros. They are an abomination unto style(9).
MFC after:	3 months
2008-10-23 15:53:51 +00:00
Kip Macy
b1efbd6b47 Fix IPI support 2008-10-23 07:20:43 +00:00
Jung-uk Kim
ce0e534eff Really fix i386 test this time.
A whole stack of pointyhat to me, please.
2008-10-22 21:03:30 +00:00
Jung-uk Kim
0c0c75a824 Add AMD Family 0Fh, Model 6Bh, Stepping 2 to the list of invariant TSCs
and fix i386 test.
2008-10-22 17:30:37 +00:00
Andrey A. Chernov
e6e4ece7d3 Fix compiler error with missing/unneded ')' 2008-10-22 14:45:30 +00:00
Jung-uk Kim
87c919e808 Set kern.timecounter.invariant_tsc to 1 for AMD CPU family 10h and higher
even if BIOS does not advertise it.
2008-10-22 00:01:53 +00:00
Kip Macy
a51ac24407 Hook in ipi handlers 2008-10-21 08:03:12 +00:00
Kip Macy
b61012a0e0 remove gratuitous XEN define 2008-10-21 08:02:18 +00:00
Kip Macy
7814418ad1 don't globally define ipi_bitmap_handler on xen 2008-10-21 08:01:19 +00:00
Kip Macy
764b7ef593 Implement infrastructure for gluing i386 ipi functions in to xen's infrastructure 2008-10-21 06:39:40 +00:00
Kip Macy
756fb0605f Add routine for initializing AP clock 2008-10-21 06:38:40 +00:00
Kip Macy
a09a884997 Header cleanups and addition of IPI declarations for xen 2008-10-21 06:38:05 +00:00
Jung-uk Kim
1f6a1a7802 Fix 'kern.timeconter.invariant_tsc' tunable and back out a redundant hack.
Somehow incomplete version was committed. :-(
2008-10-21 04:31:07 +00:00
Jung-uk Kim
f68687336b Do not use PowerNow! if FID or VID is missing. 2008-10-21 00:52:20 +00:00
Jung-uk Kim
23babe02d2 Use power management information for AMD CPUs from identcpu.c. 2008-10-21 00:44:05 +00:00
Jung-uk Kim
29462bea1e Turn off CPU frequency change notifiers when the TSC is P-state invariant
or it is forced by setting 'kern.timecounter.invariant_tsc' tunable
to non-zero.
2008-10-21 00:38:00 +00:00
Jung-uk Kim
780f139b5b Detect Advanced Power Management Information for AMD CPUs. 2008-10-21 00:17:55 +00:00
Kip Macy
39f8ee3024 Import interrupt management defines from latest xenlinux 2008-10-20 05:42:38 +00:00
Konstantin Belousov
aa8b201112 Correctly fill siginfo for the signals delivered by linux tkill/tgkill.
It is required for async cancellation to work.

Fix PROC_LOCK leak in linux_tgkill when signal delivery attempt is made
to not linux process.

Do not call em_find(p, ...) with p unlocked.

Move common code for linux_tkill() and linux_tgkill() into
linux_do_tkill().

Change linux siginfo_t definition to match actual linux one. Extend
uid fields to 4 bytes from 2. The extension does not change structure
layout and is binary compatible with previous definition, because i386
is little endian, and each uid field has 2 byte padding after it.

Reported by:	Nicolas Joly <njoly pasteur fr>
Submitted by:	dchangin
MFC after:	1 month
2008-10-19 10:02:26 +00:00
Kip Macy
dafc9be8f8 GC gratuitous XEN defines 2008-10-19 01:33:58 +00:00
Kip Macy
9bf38e47a3 - move gdt, ldt allocation to before KPT allocation
- fix bugs where we would:
    - try to map the hypervisors address space
    - accidentally kick out an existing kernel mapping for some domain creation memory allocation sizes
    - accidentally skip a 2MB kernel mapping for some domain creation memory allocation sizes
- don't rely on trapping in to xen to read rcr2, reference through vcpu
- whitespace cleanups
2008-10-19 01:27:40 +00:00