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Commit Graph

858 Commits

Author SHA1 Message Date
Steve Passe
f9e8dbb8c3 mpapic.c & mp_machdep:
- removed TEST_ALTTIMER.
 - removed APIC_PIN0_TIMER.
 - removed TIMER_ALL.

mplock.s:
 - minor update of try_mplock for new algorithm where a CPU uses try_mplock
	instead of get_mplock in the ISRs.
1997-07-26 01:55:19 +00:00
Steve Passe
12084b3cf1 clock.c:
- removed TEST_ALTTIMER.
 - removed APIC_PIN0_TIMER.
 - removed TIMER_ALL.

apic_vector.s:
 - new algorithm where a CPU uses try_mplock instead of get_mplock:
	if successful continue as before.
	if fail set ipending bit, mask INT (to avoid recursion), cleanup & iret.

   This allows the CPU to return to successful work, while the ISR will be run
   by the CPU holding the lock as part of the doreti dance.
1997-07-26 01:53:04 +00:00
KATO Takenori
4877e978b3 Treat 6x86MX CPU as 686-class CPU instead of 586-class CPU. 1997-07-24 14:19:25 +00:00
Steve Passe
812e4da7a8 New simple_lock code in asm:
- s_lock_init()
 - s_lock()
 - s_lock_try()
 - s_unlock()

Created lock for IO APIC and apic_imen  (SMP version of imen)
 - imen_lock

Code to use imen_lock for access from apic_ipl.s and apic_vector.s.
Moved this code *outside* of mp_lock.

It seems to work!!!
1997-07-23 20:47:19 +00:00
Steve Passe
87a6f31089 Last commit didn't take, operator error??? 1997-07-22 20:12:32 +00:00
Steve Passe
995655b397 Hid the existance of imen via a dump routine. 1997-07-22 19:57:30 +00:00
Steve Passe
3902c3ef1f Made the SMP case ignore the possibility of an INT13 interface.
This eliminates all the APIC code, and thus several routines that
would otherwise need to be made MP-safe.

Reviewed by:	 Bruce Evans <bde@zeta.org.au>
1997-07-21 07:57:50 +00:00
John Dyson
322d7a880b Fix a crash that has manifest itself while running X after the 4MB
page upgrades.
1997-07-21 01:21:25 +00:00
Steve Passe
35b3c4a0e5 Developed a new strategy for handling the 8254/8259/APIC issue. 1997-07-20 19:41:38 +00:00
Steve Passe
3577278519 Minor cleanup.
Pass string arg to apic_dump.
Moved bootverbose printing of SMP enabled INTs from clock.c to autoconf.c
1997-07-20 18:05:20 +00:00
Steve Passe
0571e04aee Minor cleanup. 1997-07-20 18:02:59 +00:00
Bruce Evans
f71d35e402 Removed unused #includes. 1997-07-20 14:10:18 +00:00
Bruce Evans
e31521c3dd Removed unused #includes. 1997-07-20 08:37:24 +00:00
Steve Passe
1dec61e7c0 Added code to support #define APIC_PIN0_TIMER.
This code ALWAYS runs the 8254 timer thru the 8259 ICU.
It depricates the usage of "options SMP_TIMER_NC" in the config file.
1997-07-19 04:00:35 +00:00
Steve Passe
797cb61b54 Added #code to support define APIC_PIN0_TIMER.
This code ALWAYS runs the 8254 timer thru the 8259 ICU.
It depricates the usage of "options SMP_TIMER_NC" in the config file.
1997-07-19 03:59:28 +00:00
Steve Passe
bed422e5a3 SMP or APIC_IO:
- Increased NIDT to 256.
 - Moved IPI vectors up above the linux compat vector.
 - Removed runtime setup of RTC vector.
1997-07-19 02:28:30 +00:00
Steve Passe
d2ecb616f2 Split TEST_CPUSTOP code into CPUSTOP_ON_DDBBREAK and mainline code. 1997-07-18 21:27:53 +00:00
Steve Passe
7bbd2262eb Made the printing of the APIC INTs depend on bootverbose. 1997-07-18 03:59:28 +00:00
Steve Passe
75c179003e printf cleanup. 1997-07-18 03:58:14 +00:00
John Dyson
78342719d6 Hopefully fix a few problems that could cause hangs in SMP mode.
1)	Make sure that the region mapped by a 4MB page is
	properly aligned.
2)	Don't turn on the PG_G flag in locore for SMP.  I plan
	to do that later in startup anyway.
3)	Make sure the 2nd processor has PSE enabled, so that 4MB
	pages don't hose it.

We don't use PG_G yet on SMP -- there is work to be done to make that
work correctly.  It isn't that important anyway...
1997-07-17 19:45:01 +00:00
John Dyson
0a0a85b3e0 Add support for 4MB pages. This includes the .text, .data, .data parts
of the kernel, and also most of the dynamic parts of the kernel.  Additionally,
4MB pages will be allocated for display buffers as appropriate (only.)

The 4MB support for SMP isn't complete, but doesn't interfere with operation
either.
1997-07-17 04:34:03 +00:00
Peter Wemm
5611a020da Remove the disable for the P5 cpu class bcopy using the FPU on SMP kernels,
it is understood to work now (and has been for quite a while apparently).
1997-07-17 02:09:25 +00:00
KATO Takenori
16684c0e20 Oops, added popfl after trynexgen label.
PR:		4091
Submitted by:	Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>
1997-07-15 11:07:32 +00:00
Steve Passe
bb0be67512 Cleanup. 1997-07-15 03:28:53 +00:00
Steve Passe
665bb8fab0 Tighten up asm code for TEST_PRIO and other misc. things.
Use some new defines in place of "magic numbers".
1997-07-15 02:51:20 +00:00
Steve Passe
4e914a7eb7 Tighten up asm code for EOI access. 1997-07-15 02:49:21 +00:00
Steve Passe
7503ccc1c8 new code to control other CPUs: stop_cpus()/restart_cpus()/_Xstopcpu
this code is controlled by smptests.h: TEST_CPUSTOP, OFF by default

new code for handling mixed-mode 8259/APIC programming without 'ExtInt'
this code is controlled by smptests.h: TEST_ALTTIMER, ON by default
1997-07-13 01:22:48 +00:00
Steve Passe
c064ef9175 Cleanup old stop_cpus/restart_cpus() cruft.
new code for handling mixed-mode 8259/APIC programming without 'ExtInt'
new code to control other CPUs: stop_cpus()/restart_cpus()/_Xstopcpu
1997-07-13 01:18:51 +00:00
Steve Passe
17ebd4d085 General cleanup of APIC code.
stop_cpus()/restart_cpus() STILL not working!
1997-07-08 23:46:00 +00:00
Steve Passe
afade3007a Minor cleanup of APIC code. 1997-07-08 23:42:02 +00:00
Steve Passe
9746742be0 stop_cpus(), currently BROKEN! (turned off in smptests.h by default).
restart_cpus(), currently BROKEN! (turned off in smptests.h by default).
1997-07-07 00:06:51 +00:00
Steve Passe
b956b5370c First cut at code for handling "spurious INTerrupts".
First cut at code for handling CPU stop/restart.

Notes:
	not working properly yet.
1997-07-06 23:32:38 +00:00
Steve Passe
e154505673 #ifdef out debug for now... 1997-07-06 23:25:46 +00:00
Bruce Evans
057b294dc0 Un-inline a call to spl0(). It is not time critical, and was only inline
because there was no non-inline spl0() to call.

Don't frob intr_nesting_level in idle() or cpu_switch().  Interrupts
are mostly disabled then, so the frobbing had little effect.
1997-07-01 01:34:30 +00:00
Bruce Evans
dc514523a7 Un-inline a call to spl0(). It is not time critical, and was only inline
because there was no non-inline spl0() to call.
1997-07-01 01:02:03 +00:00
Steve Passe
58db75841d apic_vector.s:
- added Xcpustop IPI code to support stop_cpus()/restart_cpus().
   it is off by default, enable via smptests.h:TEST_CPUSTOP

intr_machdep.h:
 - moved +ICULEN to lower level.
 - added entry for Xcpustop.
1997-06-27 23:48:05 +00:00
Steve Passe
b7f7f066f6 Added POST code output to various points of the startup code.
General cleanup.

New functions to stop/start CPUs via IPIs:

 - int stop_cpus( u_int map );
 - int restart_cpus( u_int map );

Turned off by default, enabled via smptests.h:TEST_CPUSTOP.
Current version has a BUG, perhaps a deadlock?
1997-06-27 23:33:17 +00:00
Steve Passe
b1c3894d1b Experimental calls to stop_cpus()/restart_cpus() within breakpoint calls.
Turned off by default in smptests.h.
1997-06-27 23:24:38 +00:00
Steve Passe
3984ec7e1f Added other_cpus to CPU private page.
This variable is a bitmap showing all CPUs present EXCEPT the CPU
owning the variable.  In other words, it is equal to the global bitmap
'all_cpus' minus its own bit.
1997-06-27 23:19:43 +00:00
Steve Passe
4ef5e4e12c Program lint1 to handle NMIs.
Till now NMIs would be ignored.  Now an NMI is caught by the BSP.
APs still ignore NMI, am working on code to allow a CPU to stop other CPUs
via an IPI.
1997-06-27 22:27:18 +00:00
Steve Passe
0eb9918b17 Removed '#include <machine/smptests.h>' line, no longer needed. 1997-06-27 18:29:55 +00:00
KATO Takenori
4962d93866 Added CPU_DIRECT_MAPPED_CACHE option which sets L1 cache in direct
mapped mode on Cyrix 486DLC box.
1997-06-27 13:46:19 +00:00
Tor Egge
b672570754 Back out a bad commit. 1997-06-26 02:04:34 +00:00
Steve Passe
8b16756603 Merged/renamed functions:
- get_isa_apic_mask() -> isa_apic_mask()
 - get_isa_apic_irq() && get_eisa_apic_irq() -> isa_apic_pin()
 - get_pci_apic_irq() -> pci_apic_pin()
1997-06-25 21:01:52 +00:00
Steve Passe
293f18dbbf Modified to use merged/renamed functions:
- get_isa_apic_mask() -> isa_apic_mask()
 - get_isa_apic_irq() && get_eisa_apic_irq() -> isa_apic_pin()
1997-06-25 21:00:00 +00:00
Tor Egge
a4ec81c7d0 Allow kernel configuration file to override PMAP_SHPGPERPROC. The default
value (200) is too low in some environments, causing a fatal
"panic: get_pv_entry: cannot get a pv_entry_t". The same panic might
still occur due to temporary shortage of free physical memory
(cf. PR i386/2431).
1997-06-25 20:07:50 +00:00
Tor Egge
9facf4a0d9 Block some interrupts during the call to pmap_zero_page in
vm_page_zero_idle. This fixes some occurences of the problem
reported in PR kern/3216: "panic: pmap_zero_page: CMAP busy"
1997-06-25 19:49:45 +00:00
Tor Egge
3b5d3246bf Ensure that the boot CPU honours write protection in kernel mode.
This fixes one of the problems noted in PR kern/3688.
1997-06-24 17:26:07 +00:00
KATO Takenori
7367854ebc Recognize AMD K5 PR166 and PR200 CPUs. 1997-06-24 09:45:35 +00:00
Steve Passe
ee889b3ba0 Fix calculation of initial mplock value.
We now use LOGICAL, not PHYSICAL, IDs to calculate the mplock.
1997-06-24 07:48:02 +00:00