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be82b3a0bf
We've removed kernel option EXT_RESOURCES almost two years ago. While it was ok to have some code under a common 'extres' subdirectory at first, we now have a lot of consumer of it and we made it mandatory so no need to have it under a cryptic name. Reviewed by: mhorne Sponsored by: Beckhoff Automation GmbH & Co. KG Differential Revision: https://reviews.freebsd.org/D43191
408 lines
10 KiB
C
408 lines
10 KiB
C
/*-
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* Copyright (c) 2017 Emmanuel Vadot <manu@freebsd.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <dev/clk/clk.h>
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#include <dev/clk/allwinner/aw_clk.h>
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#include <dev/clk/allwinner/aw_clk_nkmp.h>
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#include "clkdev_if.h"
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/*
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* clknode for clocks matching the formula :
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*
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* clk = (clkin * n * k) / (m * p)
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*
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*/
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struct aw_clk_nkmp_sc {
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uint32_t offset;
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struct aw_clk_factor n;
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struct aw_clk_factor k;
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struct aw_clk_factor m;
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struct aw_clk_factor p;
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uint32_t mux_shift;
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uint32_t mux_mask;
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uint32_t gate_shift;
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uint32_t lock_shift;
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uint32_t lock_retries;
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uint32_t update_shift;
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uint32_t flags;
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};
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#define WRITE4(_clk, off, val) \
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CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
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#define READ4(_clk, off, val) \
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CLKDEV_READ_4(clknode_get_device(_clk), off, val)
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#define MODIFY4(_clk, off, clr, set ) \
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CLKDEV_MODIFY_4(clknode_get_device(_clk), off, clr, set)
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#define DEVICE_LOCK(_clk) \
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CLKDEV_DEVICE_LOCK(clknode_get_device(_clk))
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#define DEVICE_UNLOCK(_clk) \
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CLKDEV_DEVICE_UNLOCK(clknode_get_device(_clk))
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static int
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aw_clk_nkmp_init(struct clknode *clk, device_t dev)
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{
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struct aw_clk_nkmp_sc *sc;
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uint32_t val, idx;
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sc = clknode_get_softc(clk);
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idx = 0;
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if ((sc->flags & AW_CLK_HAS_MUX) != 0) {
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DEVICE_LOCK(clk);
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READ4(clk, sc->offset, &val);
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DEVICE_UNLOCK(clk);
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idx = (val & sc->mux_mask) >> sc->mux_shift;
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}
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clknode_init_parent_idx(clk, idx);
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return (0);
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}
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static int
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aw_clk_nkmp_set_gate(struct clknode *clk, bool enable)
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{
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struct aw_clk_nkmp_sc *sc;
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uint32_t val;
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sc = clknode_get_softc(clk);
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if ((sc->flags & AW_CLK_HAS_GATE) == 0)
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return (0);
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DEVICE_LOCK(clk);
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READ4(clk, sc->offset, &val);
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if (enable)
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val |= (1 << sc->gate_shift);
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else
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val &= ~(1 << sc->gate_shift);
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WRITE4(clk, sc->offset, val);
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DEVICE_UNLOCK(clk);
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return (0);
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}
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static int
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aw_clk_nkmp_set_mux(struct clknode *clk, int index)
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{
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struct aw_clk_nkmp_sc *sc;
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uint32_t val;
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sc = clknode_get_softc(clk);
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if ((sc->flags & AW_CLK_HAS_MUX) == 0)
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return (0);
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DEVICE_LOCK(clk);
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READ4(clk, sc->offset, &val);
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val &= ~sc->mux_mask;
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val |= index << sc->mux_shift;
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WRITE4(clk, sc->offset, val);
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DEVICE_UNLOCK(clk);
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return (0);
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}
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static uint64_t
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aw_clk_nkmp_find_best(struct aw_clk_nkmp_sc *sc, uint64_t fparent, uint64_t *fout,
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uint32_t *factor_n, uint32_t *factor_k, uint32_t *factor_m, uint32_t *factor_p)
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{
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uint64_t cur, best;
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uint32_t n, k, m, p;
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best = 0;
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*factor_n = 0;
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*factor_k = 0;
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*factor_m = 0;
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*factor_p = 0;
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for (n = aw_clk_factor_get_min(&sc->n); n <= aw_clk_factor_get_max(&sc->n); ) {
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for (k = aw_clk_factor_get_min(&sc->k); k <= aw_clk_factor_get_max(&sc->k); ) {
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for (m = aw_clk_factor_get_min(&sc->m); m <= aw_clk_factor_get_max(&sc->m); ) {
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for (p = aw_clk_factor_get_min(&sc->p); p <= aw_clk_factor_get_max(&sc->p); ) {
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cur = (fparent * n * k) / (m * p);
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if ((*fout - cur) < (*fout - best)) {
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best = cur;
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*factor_n = n;
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*factor_k = k;
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*factor_m = m;
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*factor_p = p;
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}
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if (best == *fout)
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return (best);
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if ((sc->p.flags & AW_CLK_FACTOR_POWER_OF_TWO) != 0)
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p <<= 1;
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else
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p++;
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}
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if ((sc->m.flags & AW_CLK_FACTOR_POWER_OF_TWO) != 0)
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m <<= 1;
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else
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m++;
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}
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if ((sc->k.flags & AW_CLK_FACTOR_POWER_OF_TWO) != 0)
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k <<= 1;
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else
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k++;
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}
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if ((sc->n.flags & AW_CLK_FACTOR_POWER_OF_TWO) != 0)
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n <<= 1;
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else
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n++;
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}
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return best;
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}
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static void
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aw_clk_nkmp_set_freq_scale(struct clknode *clk, struct aw_clk_nkmp_sc *sc,
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uint32_t factor_n, uint32_t factor_k, uint32_t factor_m, uint32_t factor_p)
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{
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uint32_t val, m, p;
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int retry;
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DEVICE_LOCK(clk);
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READ4(clk, sc->offset, &val);
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m = aw_clk_get_factor(val, &sc->m);
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p = aw_clk_get_factor(val, &sc->p);
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if (p < factor_p) {
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val &= ~sc->p.mask;
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val |= aw_clk_factor_get_value(&sc->p, factor_p) << sc->p.shift;
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WRITE4(clk, sc->offset, val);
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DELAY(2000);
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}
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if (m < factor_m) {
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val &= ~sc->m.mask;
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val |= aw_clk_factor_get_value(&sc->m, factor_m) << sc->m.shift;
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WRITE4(clk, sc->offset, val);
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DELAY(2000);
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}
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val &= ~sc->n.mask;
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val &= ~sc->k.mask;
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val |= aw_clk_factor_get_value(&sc->n, factor_n) << sc->n.shift;
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val |= aw_clk_factor_get_value(&sc->k, factor_k) << sc->k.shift;
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WRITE4(clk, sc->offset, val);
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DELAY(2000);
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if (m > factor_m) {
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val &= ~sc->m.mask;
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val |= aw_clk_factor_get_value(&sc->m, factor_m) << sc->m.shift;
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WRITE4(clk, sc->offset, val);
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DELAY(2000);
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}
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if (p > factor_p) {
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val &= ~sc->p.mask;
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val |= aw_clk_factor_get_value(&sc->p, factor_p) << sc->p.shift;
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WRITE4(clk, sc->offset, val);
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DELAY(2000);
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}
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if ((sc->flags & AW_CLK_HAS_LOCK) != 0) {
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for (retry = 0; retry < sc->lock_retries; retry++) {
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READ4(clk, sc->offset, &val);
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if ((val & (1 << sc->lock_shift)) != 0)
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break;
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DELAY(1000);
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}
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}
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DEVICE_UNLOCK(clk);
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}
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static int
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aw_clk_nkmp_set_freq(struct clknode *clk, uint64_t fparent, uint64_t *fout,
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int flags, int *stop)
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{
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struct aw_clk_nkmp_sc *sc;
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uint64_t best;
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uint32_t val, best_n, best_k, best_m, best_p;
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int retry;
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sc = clknode_get_softc(clk);
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best = aw_clk_nkmp_find_best(sc, fparent, fout,
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&best_n, &best_k, &best_m, &best_p);
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if ((flags & CLK_SET_DRYRUN) != 0) {
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*fout = best;
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*stop = 1;
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return (0);
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}
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if ((best < *fout) &&
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((flags & CLK_SET_ROUND_DOWN) != 0)) {
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*stop = 1;
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return (ERANGE);
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}
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if ((best > *fout) &&
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((flags & CLK_SET_ROUND_UP) != 0)) {
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*stop = 1;
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return (ERANGE);
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}
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if ((sc->flags & AW_CLK_SCALE_CHANGE) != 0)
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aw_clk_nkmp_set_freq_scale(clk, sc,
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best_n, best_k, best_m, best_p);
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else {
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DEVICE_LOCK(clk);
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READ4(clk, sc->offset, &val);
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val &= ~sc->n.mask;
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val &= ~sc->k.mask;
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val &= ~sc->m.mask;
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val &= ~sc->p.mask;
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val |= aw_clk_factor_get_value(&sc->n, best_n) << sc->n.shift;
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val |= aw_clk_factor_get_value(&sc->k, best_k) << sc->k.shift;
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val |= aw_clk_factor_get_value(&sc->m, best_m) << sc->m.shift;
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val |= aw_clk_factor_get_value(&sc->p, best_p) << sc->p.shift;
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WRITE4(clk, sc->offset, val);
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DELAY(2000);
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DEVICE_UNLOCK(clk);
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if ((sc->flags & AW_CLK_HAS_UPDATE) != 0) {
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DEVICE_LOCK(clk);
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READ4(clk, sc->offset, &val);
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val |= 1 << sc->update_shift;
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WRITE4(clk, sc->offset, val);
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DELAY(2000);
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DEVICE_UNLOCK(clk);
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}
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if ((sc->flags & AW_CLK_HAS_LOCK) != 0) {
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for (retry = 0; retry < sc->lock_retries; retry++) {
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READ4(clk, sc->offset, &val);
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if ((val & (1 << sc->lock_shift)) != 0)
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break;
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DELAY(1000);
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}
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}
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}
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*fout = best;
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*stop = 1;
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return (0);
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}
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static int
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aw_clk_nkmp_recalc(struct clknode *clk, uint64_t *freq)
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{
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struct aw_clk_nkmp_sc *sc;
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uint32_t val, m, n, k, p;
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sc = clknode_get_softc(clk);
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DEVICE_LOCK(clk);
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READ4(clk, sc->offset, &val);
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DEVICE_UNLOCK(clk);
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n = aw_clk_get_factor(val, &sc->n);
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k = aw_clk_get_factor(val, &sc->k);
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m = aw_clk_get_factor(val, &sc->m);
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p = aw_clk_get_factor(val, &sc->p);
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*freq = (*freq * n * k) / (m * p);
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return (0);
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}
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static clknode_method_t aw_nkmp_clknode_methods[] = {
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/* Device interface */
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CLKNODEMETHOD(clknode_init, aw_clk_nkmp_init),
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CLKNODEMETHOD(clknode_set_gate, aw_clk_nkmp_set_gate),
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CLKNODEMETHOD(clknode_set_mux, aw_clk_nkmp_set_mux),
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CLKNODEMETHOD(clknode_recalc_freq, aw_clk_nkmp_recalc),
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CLKNODEMETHOD(clknode_set_freq, aw_clk_nkmp_set_freq),
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CLKNODEMETHOD_END
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};
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DEFINE_CLASS_1(aw_nkmp_clknode, aw_nkmp_clknode_class, aw_nkmp_clknode_methods,
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sizeof(struct aw_clk_nkmp_sc), clknode_class);
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int
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aw_clk_nkmp_register(struct clkdom *clkdom, struct aw_clk_nkmp_def *clkdef)
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{
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struct clknode *clk;
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struct aw_clk_nkmp_sc *sc;
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clk = clknode_create(clkdom, &aw_nkmp_clknode_class, &clkdef->clkdef);
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if (clk == NULL)
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return (1);
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sc = clknode_get_softc(clk);
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sc->offset = clkdef->offset;
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sc->n.shift = clkdef->n.shift;
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sc->n.width = clkdef->n.width;
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sc->n.mask = ((1 << clkdef->n.width) - 1) << sc->n.shift;
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sc->n.value = clkdef->n.value;
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sc->n.flags = clkdef->n.flags;
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sc->k.shift = clkdef->k.shift;
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sc->k.width = clkdef->k.width;
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sc->k.mask = ((1 << clkdef->k.width) - 1) << sc->k.shift;
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sc->k.value = clkdef->k.value;
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sc->k.flags = clkdef->k.flags;
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sc->m.shift = clkdef->m.shift;
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sc->m.width = clkdef->m.width;
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sc->m.mask = ((1 << clkdef->m.width) - 1) << sc->m.shift;
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sc->m.value = clkdef->m.value;
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sc->m.flags = clkdef->m.flags;
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sc->p.shift = clkdef->p.shift;
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sc->p.width = clkdef->p.width;
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sc->p.mask = ((1 << clkdef->p.width) - 1) << sc->p.shift;
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sc->p.value = clkdef->p.value;
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sc->p.flags = clkdef->p.flags;
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sc->mux_shift = clkdef->mux_shift;
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sc->mux_mask = ((1 << clkdef->mux_width) - 1) << sc->mux_shift;
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sc->gate_shift = clkdef->gate_shift;
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sc->lock_shift = clkdef->lock_shift;
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sc->lock_retries = clkdef->lock_retries;
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sc->update_shift = clkdef->update_shift;
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sc->flags = clkdef->flags;
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clknode_register(clkdom, clk);
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return (0);
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}
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