Marius Strobl ae3b789193 - Use the actual clock frequency of the PCI bus instead of assuming ... 33MHz for calculating the latency timer values for its children. Inspired by NetBSD doing the same and Linux as well as OpenSolaris using a similar approach. While at it rename a variable and change its type to be more appropriate fuer values of PCI properties so the variable can be more easily reused. - Initialize the cache line size register of PCI devices to a legal value; the cache line size is limited to 64 bytes by the Fireplane/Safari, JBus and UPA interconnection busses. Setting it to an unsupported value caused bad performance at least with GEM as it causes them to not do cache line bursts and to not issue cache line commands on the PCI bus. Approved by: re (kensmith) MFC after: 1 week		2007-09-26 20:10:36 +00:00
..
apb.c	- Make pcib_devclass private to sys/dev/pci/pci_pci.c and change all the	2006-01-06 19:22:19 +00:00
ofw_pci_if.m	- Move ofw_pci_alloc_busno() to the ofw_pci KOBJ interface,	2007-06-18 21:49:42 +00:00
ofw_pci.h	- Move ofw_pci_alloc_busno() to the ofw_pci KOBJ interface,	2007-06-18 21:49:42 +00:00
ofw_pcib_subr.c	- Move ofw_pci_alloc_busno() to the ofw_pci KOBJ interface,	2007-06-18 21:49:42 +00:00
ofw_pcib_subr.h
ofw_pcib.c	For sun4u also add PCI busses with a device unit number of -1	2007-06-18 21:46:07 +00:00
ofw_pcibus.c	- Use the actual clock frequency of the PCI bus instead of assuming	2007-09-26 20:10:36 +00:00
psycho.c	o Revamp the sparc64 interrupt code in order to be able to interface	2007-09-06 19:16:30 +00:00
psychoreg.h	o Revamp the sparc64 interrupt code in order to be able to interface	2007-09-06 19:16:30 +00:00
psychovar.h	- Use the newly introduced pcib_mtx spin lock to lock psycho_ce(),	2007-06-16 23:46:41 +00:00