sfxge: infer external port numbering for Pavia

Adjust external port mapping table to distinguish Pavia from Monza.
Now the presence of any 40G mode implies at least 2 outputs per
external port.  So Pavia 4x10G ports are now mapped to 1,2,3,4;
Monza 4x10G ports map to 1,1,2,2 as before.

Submitted by:   Richard Houldsworth <rhouldsworth at solarflare.com>
Sponsored by:   Solarflare Communications, Inc.
MFC after:      2 days
This commit is contained in:
Andrew Rybchenko 2015-11-27 16:03:51 +00:00
parent 48ec66b35f
commit 102c7e9e62
1 changed files with 11 additions and 3 deletions

View File

@ -948,19 +948,27 @@ static struct {
{
EFX_FAMILY_HUNTINGTON,
(1 << TLV_PORT_MODE_10G) |
(1 << TLV_PORT_MODE_40G) |
(1 << TLV_PORT_MODE_10G_10G) |
(1 << TLV_PORT_MODE_40G_40G),
(1 << TLV_PORT_MODE_10G_10G_10G_10G),
1
},
/* Supported modes requiring 2 outputs per port */
{
EFX_FAMILY_HUNTINGTON,
(1 << TLV_PORT_MODE_10G_10G_10G_10G) |
(1 << TLV_PORT_MODE_40G) |
(1 << TLV_PORT_MODE_40G_40G) |
(1 << TLV_PORT_MODE_40G_10G_10G) |
(1 << TLV_PORT_MODE_10G_10G_40G),
2
}
/*
* NOTE: Medford modes will require 4 outputs per port:
* TLV_PORT_MODE_10G_10G_10G_10G_Q
* TLV_PORT_MODE_10G_10G_10G_10G_Q2
* The Q2 mode routes outputs to external port 2. Support for this
* will require a new field specifying the number to add after
* scaling by stride. This is fixed at 1 currently.
*/
};
static __checkReturn int