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Mark the ThunderX and generic PCI drivers as cache-coherent when we know 

this to be the case. This will mean we don't try and handle the cache in
bus_dmamap_sync when it is not needed.

Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D6605
This commit is contained in:
Andrew Turner 2016-05-31 09:15:21 +00:00
parent 78fe75bc28
commit 2760c2cad4
5 changed files with 65 additions and 1 deletions
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1
sys/arm64/cavium/thunder_pcie_fdt.c
View File

@ -119,6 +119,7 @@ thunder_pcie_fdt_attach(device_t dev)
sc = device_get_softc(dev);
thunder_pcie_identify_ecam(dev, &sc->ecam);
sc->coherent = 1;
return (pci_host_generic_attach(dev));
}

27
sys/arm64/cavium/thunder_pcie_pem.c
View File

@ -137,6 +137,7 @@ static int thunder_pem_get_id(device_t, device_t, enum pci_id_type,
static int thunder_pem_attach(device_t);
static int thunder_pem_deactivate_resource(device_t, device_t, int, int,
struct resource *);
static bus_dma_tag_t thunder_pem_get_dma_tag(device_t, device_t);
static int thunder_pem_detach(device_t);
static uint64_t thunder_pem_config_reg_read(struct thunder_pem_softc *, int);
static int thunder_pem_link_init(struct thunder_pem_softc *);
@ -176,6 +177,8 @@ static device_method_t thunder_pem_methods[] = {
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
DEVMETHOD(bus_get_dma_tag, thunder_pem_get_dma_tag),
/* pcib interface */
DEVMETHOD(pcib_maxslots, thunder_pem_maxslots),
DEVMETHOD(pcib_read_config, thunder_pem_read_config),
@ -331,6 +334,15 @@ thunder_pem_adjust_resource(device_t dev, device_t child, int type,
return (rman_adjust_resource(res, start, end));
}
static bus_dma_tag_t
thunder_pem_get_dma_tag(device_t dev, device_t child)
{
struct thunder_pem_softc *sc;
sc = device_get_softc(dev);
return (sc->dmat);
}
static int
thunder_pem_alloc_msi(device_t pci, device_t child, int count, int maxcount,
int *irqs)
@ -766,6 +778,21 @@ thunder_pem_attach(device_t dev)
sc->reg_bst = rman_get_bustag(sc->reg);
sc->reg_bsh = rman_get_bushandle(sc->reg);
/* Create the parent DMA tag to pass down the coherent flag */
error = bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */
1, 0, /* alignment, bounds */
BUS_SPACE_MAXADDR, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
BUS_SPACE_MAXSIZE, /* maxsize */
BUS_SPACE_UNRESTRICTED, /* nsegments */
BUS_SPACE_MAXSIZE, /* maxsegsize */
BUS_DMA_COHERENT, /* flags */
NULL, NULL, /* lockfunc, lockarg */
&sc->dmat);
if (error != 0)
return (error);
/* Map SLI, do it only once */
if (!sli0_s2m_regx_base) {
bus_space_map(sc->reg_bst, SLIX_S2M_REGX_ACC,

1
sys/arm64/cavium/thunder_pcie_pem.h
View File

@ -39,6 +39,7 @@ struct thunder_pem_softc {
struct resource *reg;
bus_space_tag_t reg_bst;
bus_space_handle_t reg_bsh;
bus_dma_tag_t dmat;
struct pcie_range ranges[MAX_RANGES_TUPLES];
struct rman mem_rman;
struct rman io_rman;

35
sys/dev/pci/pci_host_generic.c
View File

@ -181,6 +181,29 @@ pci_host_generic_attach(device_t dev)
if (generic_pcie_ofw_bus_attach(dev) != 0)
return (ENXIO);
node = ofw_bus_get_node(dev);
if (sc->coherent == 0) {
sc->coherent = OF_hasprop(node, "dma-coherent");
}
//if (bootverbose)
device_printf(dev, "Bus is%s cache-coherent\n",
sc->coherent ? "" : " not");
/* Create the parent DMA tag to pass down the coherent flag */
error = bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */
1, 0, /* alignment, bounds */
BUS_SPACE_MAXADDR, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
BUS_SPACE_MAXSIZE, /* maxsize */
BUS_SPACE_UNRESTRICTED, /* nsegments */
BUS_SPACE_MAXSIZE, /* maxsegsize */
sc->coherent ? BUS_DMA_COHERENT : 0, /* flags */
NULL, NULL, /* lockfunc, lockarg */
&sc->dmat);
if (error != 0)
return (error);
rid = 0;
sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
if (sc->res == NULL) {
@ -232,7 +255,6 @@ pci_host_generic_attach(device_t dev)
}
}
node = ofw_bus_get_node(dev);
ofw_bus_setup_iinfo(node, &sc->pci_iinfo, sizeof(cell_t));
device_add_child(dev, "pci", -1);
@ -682,6 +704,15 @@ generic_pcie_deactivate_resource(device_t dev, device_t child, int type, int rid
return (res);
}
static bus_dma_tag_t
generic_pcie_get_dma_tag(device_t dev, device_t child)
{
struct generic_pcie_softc *sc;
sc = device_get_softc(dev);
return (sc->dmat);
}
static int
generic_pcie_alloc_msi(device_t pci, device_t child, int count, int maxcount,
int *irqs)
@ -798,6 +829,8 @@ static device_method_t generic_pcie_methods[] = {
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
DEVMETHOD(bus_get_dma_tag, generic_pcie_get_dma_tag),
/* pcib interface */
DEVMETHOD(pcib_maxslots, generic_pcie_maxslots),
DEVMETHOD(pcib_route_interrupt, generic_pcie_route_interrupt),

2
sys/dev/pci/pci_host_generic.h
View File

@ -49,6 +49,7 @@ struct pcie_range {
struct generic_pcie_softc {
struct pcie_range ranges[MAX_RANGES_TUPLES];
int nranges;
int coherent;
struct rman mem_rman;
struct rman io_rman;
struct resource *res;
@ -58,6 +59,7 @@ struct generic_pcie_softc {
bus_space_handle_t bsh;
device_t dev;
bus_space_handle_t ioh;
bus_dma_tag_t dmat;
#ifdef FDT
struct ofw_bus_iinfo pci_iinfo;
#endif