Added PC-98 code.
This commit is contained in:
KATO Takenori
parent
4e370d3488
commit
40b2de1758
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@ -34,7 +34,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)isa.c 7.2 (Berkeley) 5/13/91
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* $Id: isa.c,v 1.85 1997/05/26 14:42:24 se Exp $
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* $Id: intr_machdep.c,v 1.1 1997/06/02 08:19:04 dfr Exp $
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*/
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#include "opt_auto_eoi.h"
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@ -55,7 +55,13 @@
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#include <vm/vm_param.h>
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#include <vm/pmap.h>
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#include <i386/isa/isa_device.h>
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#ifdef PC98
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#include <pc98/pc98/pc98.h>
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#include <pc98/pc98/pc98_machdep.h>
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#include <pc98/pc98/epsonio.h>
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#else
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#include <i386/isa/isa.h>
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#endif
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#include <i386/isa/icu.h>
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#include <i386/isa/ic/i8237.h>
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#include "vector.h"
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@ -63,6 +69,15 @@
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#include <i386/isa/intr_machdep.h>
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#include <sys/interrupt.h>
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/* XXX should be in suitable include files */
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#ifdef PC98
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#define ICU_IMR_OFFSET 2 /* IO_ICU{1,2} + 2 */
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#define ICU_SLAVEID 7
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#else
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#define ICU_IMR_OFFSET 1 /* IO_ICU{1,2} + 1 */
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#define ICU_SLAVEID 2
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#endif
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#ifdef APIC_IO
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/*
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* This is to accommodate "mixed-mode" programming for
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@ -107,11 +122,16 @@ static inthand_t *slowintr[ICU_LEN] = {
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static inthand2_t isa_strayintr;
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#ifdef PC98
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#define NMI_PARITY 0x04
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#define NMI_EPARITY 0x02
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#else
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#define NMI_PARITY (1 << 7)
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#define NMI_IOCHAN (1 << 6)
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#define ENMI_WATCHDOG (1 << 7)
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#define ENMI_BUSTIMER (1 << 6)
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#define ENMI_IOSTATUS (1 << 5)
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#endif
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/*
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* Handle a NMI, possibly a machine check.
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@ -121,6 +141,19 @@ int
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isa_nmi(cd)
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int cd;
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{
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#ifdef PC98
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int port = inb(0x33);
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if (epson_machine_id == 0x20)
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epson_outb(0xc16, epson_inb(0xc16) | 0x1);
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if (port & NMI_PARITY) {
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panic("BASE RAM parity error, likely hardware failure.");
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} else if (port & NMI_EPARITY) {
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panic("EXTENDED RAM parity error, likely hardware failure.");
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} else {
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printf("\nNMI Resume ??\n");
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return(0);
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}
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#else /* IBM-PC */
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int isa_port = inb(0x61);
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int eisa_port = inb(0x461);
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if(isa_port & NMI_PARITY) {
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@ -137,6 +170,7 @@ isa_nmi(cd)
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printf("\nNMI ISA %x, EISA %x\n", isa_port, eisa_port);
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return(0);
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}
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#endif
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}
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/*
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@ -154,26 +188,41 @@ isa_defaultirq()
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/* initialize 8259's */
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outb(IO_ICU1, 0x11); /* reset; program device, four bytes */
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outb(IO_ICU1+1, NRSVIDT); /* starting at this vector index */
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outb(IO_ICU1+1, 1<<2); /* slave on line 2 */
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outb(IO_ICU1+ICU_IMR_OFFSET, NRSVIDT); /* starting at this vector index */
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outb(IO_ICU1+ICU_IMR_OFFSET, IRQ_SLAVE); /* slave on line 7 */
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#ifdef PC98
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#ifdef AUTO_EOI_1
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outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */
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outb(IO_ICU1+ICU_IMR_OFFSET, 0x1f); /* (master) auto EOI, 8086 mode */
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#else
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outb(IO_ICU1+1, 1); /* 8086 mode */
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outb(IO_ICU1+ICU_IMR_OFFSET, 0x1d); /* (master) 8086 mode */
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#endif
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outb(IO_ICU1+1, 0xff); /* leave interrupts masked */
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#else /* IBM-PC */
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#ifdef AUTO_EOI_1
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outb(IO_ICU1+ICU_IMR_OFFSET, 2 | 1); /* auto EOI, 8086 mode */
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#else
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outb(IO_ICU1+ICU_IMR_OFFSET, 1); /* 8086 mode */
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#endif
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#endif /* PC98 */
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outb(IO_ICU1+ICU_IMR_OFFSET, 0xff); /* leave interrupts masked */
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outb(IO_ICU1, 0x0a); /* default to IRR on read */
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#ifndef PC98
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outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */
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#endif /* !PC98 */
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outb(IO_ICU2, 0x11); /* reset; program device, four bytes */
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outb(IO_ICU2+1, NRSVIDT+8); /* staring at this vector index */
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outb(IO_ICU2+1,2); /* my slave id is 2 */
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outb(IO_ICU2+ICU_IMR_OFFSET, NRSVIDT+8); /* staring at this vector index */
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outb(IO_ICU2+ICU_IMR_OFFSET, ICU_SLAVEID); /* my slave id is 7 */
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#ifdef PC98
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outb(IO_ICU2+ICU_IMR_OFFSET,9); /* 8086 mode */
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#else /* IBM-PC */
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#ifdef AUTO_EOI_2
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outb(IO_ICU2+1, 2 | 1); /* auto EOI, 8086 mode */
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outb(IO_ICU2+ICU_IMR_OFFSET, 2 | 1); /* auto EOI, 8086 mode */
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#else
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outb(IO_ICU2+1,1); /* 8086 mode */
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outb(IO_ICU2+ICU_IMR_OFFSET,1); /* 8086 mode */
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#endif
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outb(IO_ICU2+1, 0xff); /* leave interrupts masked */
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#endif /* PC98 */
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outb(IO_ICU2+ICU_IMR_OFFSET, 0xff); /* leave interrupts masked */
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outb(IO_ICU2, 0x0a); /* default to IRR on read */
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}
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@ -263,7 +312,7 @@ update_intr_masks(void)
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#if defined(APIC_IO)
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/* no 8259 SLAVE to ignore */
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#else
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if (intr==2) continue; /* ignore 8259 SLAVE output */
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if (intr==ICU_SLAVEID) continue; /* ignore 8259 SLAVE output */
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#endif /* APIC_IO */
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maskptr = intr_mptr[intr];
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if (!maskptr) continue;
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@ -360,7 +409,7 @@ icu_setup(int intr, inthand2_t *handler, void *arg, u_int *maskptr, int flags)
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#if defined(APIC_IO)
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if ((u_int)intr >= ICU_LEN) /* no 8259 SLAVE to ignore */
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#else
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if ((u_int)intr >= ICU_LEN || intr == 2)
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if ((u_int)intr >= ICU_LEN || intr == ICU_SLAVEID)
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#endif /* APIC_IO */
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if (intr_handler[intr] != isa_strayintr)
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return (EBUSY);
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@ -34,7 +34,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)isa.c 7.2 (Berkeley) 5/13/91
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* $Id: isa.c,v 1.85 1997/05/26 14:42:24 se Exp $
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* $Id: intr_machdep.c,v 1.1 1997/06/02 08:19:04 dfr Exp $
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*/
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#include "opt_auto_eoi.h"
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@ -55,7 +55,13 @@
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#include <vm/vm_param.h>
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#include <vm/pmap.h>
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#include <i386/isa/isa_device.h>
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#ifdef PC98
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#include <pc98/pc98/pc98.h>
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#include <pc98/pc98/pc98_machdep.h>
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#include <pc98/pc98/epsonio.h>
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#else
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#include <i386/isa/isa.h>
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#endif
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#include <i386/isa/icu.h>
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#include <i386/isa/ic/i8237.h>
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#include "vector.h"
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@ -63,6 +69,15 @@
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#include <i386/isa/intr_machdep.h>
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#include <sys/interrupt.h>
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/* XXX should be in suitable include files */
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#ifdef PC98
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#define ICU_IMR_OFFSET 2 /* IO_ICU{1,2} + 2 */
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#define ICU_SLAVEID 7
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#else
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#define ICU_IMR_OFFSET 1 /* IO_ICU{1,2} + 1 */
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#define ICU_SLAVEID 2
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#endif
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#ifdef APIC_IO
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/*
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* This is to accommodate "mixed-mode" programming for
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@ -107,11 +122,16 @@ static inthand_t *slowintr[ICU_LEN] = {
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static inthand2_t isa_strayintr;
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#ifdef PC98
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#define NMI_PARITY 0x04
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#define NMI_EPARITY 0x02
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#else
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#define NMI_PARITY (1 << 7)
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#define NMI_IOCHAN (1 << 6)
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#define ENMI_WATCHDOG (1 << 7)
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#define ENMI_BUSTIMER (1 << 6)
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#define ENMI_IOSTATUS (1 << 5)
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#endif
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/*
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* Handle a NMI, possibly a machine check.
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@ -121,6 +141,19 @@ int
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isa_nmi(cd)
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int cd;
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{
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#ifdef PC98
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int port = inb(0x33);
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if (epson_machine_id == 0x20)
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epson_outb(0xc16, epson_inb(0xc16) | 0x1);
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if (port & NMI_PARITY) {
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panic("BASE RAM parity error, likely hardware failure.");
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} else if (port & NMI_EPARITY) {
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panic("EXTENDED RAM parity error, likely hardware failure.");
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} else {
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printf("\nNMI Resume ??\n");
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return(0);
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}
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#else /* IBM-PC */
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int isa_port = inb(0x61);
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int eisa_port = inb(0x461);
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if(isa_port & NMI_PARITY) {
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@ -137,6 +170,7 @@ isa_nmi(cd)
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printf("\nNMI ISA %x, EISA %x\n", isa_port, eisa_port);
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return(0);
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}
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#endif
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}
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/*
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@ -154,26 +188,41 @@ isa_defaultirq()
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/* initialize 8259's */
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outb(IO_ICU1, 0x11); /* reset; program device, four bytes */
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outb(IO_ICU1+1, NRSVIDT); /* starting at this vector index */
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outb(IO_ICU1+1, 1<<2); /* slave on line 2 */
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outb(IO_ICU1+ICU_IMR_OFFSET, NRSVIDT); /* starting at this vector index */
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outb(IO_ICU1+ICU_IMR_OFFSET, IRQ_SLAVE); /* slave on line 7 */
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#ifdef PC98
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#ifdef AUTO_EOI_1
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outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */
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outb(IO_ICU1+ICU_IMR_OFFSET, 0x1f); /* (master) auto EOI, 8086 mode */
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#else
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outb(IO_ICU1+1, 1); /* 8086 mode */
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outb(IO_ICU1+ICU_IMR_OFFSET, 0x1d); /* (master) 8086 mode */
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#endif
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outb(IO_ICU1+1, 0xff); /* leave interrupts masked */
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#else /* IBM-PC */
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#ifdef AUTO_EOI_1
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outb(IO_ICU1+ICU_IMR_OFFSET, 2 | 1); /* auto EOI, 8086 mode */
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#else
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outb(IO_ICU1+ICU_IMR_OFFSET, 1); /* 8086 mode */
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#endif
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#endif /* PC98 */
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outb(IO_ICU1+ICU_IMR_OFFSET, 0xff); /* leave interrupts masked */
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outb(IO_ICU1, 0x0a); /* default to IRR on read */
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#ifndef PC98
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outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */
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#endif /* !PC98 */
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outb(IO_ICU2, 0x11); /* reset; program device, four bytes */
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outb(IO_ICU2+1, NRSVIDT+8); /* staring at this vector index */
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outb(IO_ICU2+1,2); /* my slave id is 2 */
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outb(IO_ICU2+ICU_IMR_OFFSET, NRSVIDT+8); /* staring at this vector index */
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outb(IO_ICU2+ICU_IMR_OFFSET, ICU_SLAVEID); /* my slave id is 7 */
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#ifdef PC98
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outb(IO_ICU2+ICU_IMR_OFFSET,9); /* 8086 mode */
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#else /* IBM-PC */
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#ifdef AUTO_EOI_2
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outb(IO_ICU2+1, 2 | 1); /* auto EOI, 8086 mode */
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outb(IO_ICU2+ICU_IMR_OFFSET, 2 | 1); /* auto EOI, 8086 mode */
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#else
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outb(IO_ICU2+1,1); /* 8086 mode */
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outb(IO_ICU2+ICU_IMR_OFFSET,1); /* 8086 mode */
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#endif
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outb(IO_ICU2+1, 0xff); /* leave interrupts masked */
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#endif /* PC98 */
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outb(IO_ICU2+ICU_IMR_OFFSET, 0xff); /* leave interrupts masked */
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outb(IO_ICU2, 0x0a); /* default to IRR on read */
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}
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@ -263,7 +312,7 @@ update_intr_masks(void)
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#if defined(APIC_IO)
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/* no 8259 SLAVE to ignore */
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#else
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if (intr==2) continue; /* ignore 8259 SLAVE output */
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if (intr==ICU_SLAVEID) continue; /* ignore 8259 SLAVE output */
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#endif /* APIC_IO */
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maskptr = intr_mptr[intr];
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if (!maskptr) continue;
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@ -360,7 +409,7 @@ icu_setup(int intr, inthand2_t *handler, void *arg, u_int *maskptr, int flags)
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#if defined(APIC_IO)
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if ((u_int)intr >= ICU_LEN) /* no 8259 SLAVE to ignore */
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#else
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if ((u_int)intr >= ICU_LEN || intr == 2)
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if ((u_int)intr >= ICU_LEN || intr == ICU_SLAVEID)
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#endif /* APIC_IO */
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if (intr_handler[intr] != isa_strayintr)
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return (EBUSY);
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@ -34,7 +34,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)isa.c 7.2 (Berkeley) 5/13/91
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* $Id: isa.c,v 1.85 1997/05/26 14:42:24 se Exp $
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* $Id: intr_machdep.c,v 1.1 1997/06/02 08:19:04 dfr Exp $
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*/
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#include "opt_auto_eoi.h"
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@ -55,7 +55,13 @@
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#include <vm/vm_param.h>
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#include <vm/pmap.h>
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#include <i386/isa/isa_device.h>
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#ifdef PC98
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#include <pc98/pc98/pc98.h>
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#include <pc98/pc98/pc98_machdep.h>
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#include <pc98/pc98/epsonio.h>
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#else
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#include <i386/isa/isa.h>
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#endif
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#include <i386/isa/icu.h>
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#include <i386/isa/ic/i8237.h>
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#include "vector.h"
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@ -63,6 +69,15 @@
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#include <i386/isa/intr_machdep.h>
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#include <sys/interrupt.h>
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/* XXX should be in suitable include files */
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#ifdef PC98
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#define ICU_IMR_OFFSET 2 /* IO_ICU{1,2} + 2 */
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#define ICU_SLAVEID 7
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#else
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#define ICU_IMR_OFFSET 1 /* IO_ICU{1,2} + 1 */
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#define ICU_SLAVEID 2
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#endif
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#ifdef APIC_IO
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/*
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* This is to accommodate "mixed-mode" programming for
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@ -107,11 +122,16 @@ static inthand_t *slowintr[ICU_LEN] = {
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static inthand2_t isa_strayintr;
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#ifdef PC98
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#define NMI_PARITY 0x04
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#define NMI_EPARITY 0x02
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#else
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#define NMI_PARITY (1 << 7)
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#define NMI_IOCHAN (1 << 6)
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#define ENMI_WATCHDOG (1 << 7)
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#define ENMI_BUSTIMER (1 << 6)
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#define ENMI_IOSTATUS (1 << 5)
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#endif
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/*
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* Handle a NMI, possibly a machine check.
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@ -121,6 +141,19 @@ int
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isa_nmi(cd)
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int cd;
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{
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#ifdef PC98
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int port = inb(0x33);
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if (epson_machine_id == 0x20)
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epson_outb(0xc16, epson_inb(0xc16) | 0x1);
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if (port & NMI_PARITY) {
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panic("BASE RAM parity error, likely hardware failure.");
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} else if (port & NMI_EPARITY) {
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panic("EXTENDED RAM parity error, likely hardware failure.");
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} else {
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printf("\nNMI Resume ??\n");
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return(0);
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}
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#else /* IBM-PC */
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int isa_port = inb(0x61);
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int eisa_port = inb(0x461);
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if(isa_port & NMI_PARITY) {
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@ -137,6 +170,7 @@ isa_nmi(cd)
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printf("\nNMI ISA %x, EISA %x\n", isa_port, eisa_port);
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return(0);
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}
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#endif
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}
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/*
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@ -154,26 +188,41 @@ isa_defaultirq()
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/* initialize 8259's */
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outb(IO_ICU1, 0x11); /* reset; program device, four bytes */
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outb(IO_ICU1+1, NRSVIDT); /* starting at this vector index */
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||||
outb(IO_ICU1+1, 1<<2); /* slave on line 2 */
|
||||
|
||||
outb(IO_ICU1+ICU_IMR_OFFSET, NRSVIDT); /* starting at this vector index */
|
||||
outb(IO_ICU1+ICU_IMR_OFFSET, IRQ_SLAVE); /* slave on line 7 */
|
||||
#ifdef PC98
|
||||
#ifdef AUTO_EOI_1
|
||||
outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */
|
||||
outb(IO_ICU1+ICU_IMR_OFFSET, 0x1f); /* (master) auto EOI, 8086 mode */
|
||||
#else
|
||||
outb(IO_ICU1+1, 1); /* 8086 mode */
|
||||
outb(IO_ICU1+ICU_IMR_OFFSET, 0x1d); /* (master) 8086 mode */
|
||||
#endif
|
||||
outb(IO_ICU1+1, 0xff); /* leave interrupts masked */
|
||||
#else /* IBM-PC */
|
||||
#ifdef AUTO_EOI_1
|
||||
outb(IO_ICU1+ICU_IMR_OFFSET, 2 | 1); /* auto EOI, 8086 mode */
|
||||
#else
|
||||
outb(IO_ICU1+ICU_IMR_OFFSET, 1); /* 8086 mode */
|
||||
#endif
|
||||
#endif /* PC98 */
|
||||
outb(IO_ICU1+ICU_IMR_OFFSET, 0xff); /* leave interrupts masked */
|
||||
outb(IO_ICU1, 0x0a); /* default to IRR on read */
|
||||
#ifndef PC98
|
||||
outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */
|
||||
#endif /* !PC98 */
|
||||
|
||||
outb(IO_ICU2, 0x11); /* reset; program device, four bytes */
|
||||
outb(IO_ICU2+1, NRSVIDT+8); /* staring at this vector index */
|
||||
outb(IO_ICU2+1,2); /* my slave id is 2 */
|
||||
outb(IO_ICU2+ICU_IMR_OFFSET, NRSVIDT+8); /* staring at this vector index */
|
||||
outb(IO_ICU2+ICU_IMR_OFFSET, ICU_SLAVEID); /* my slave id is 7 */
|
||||
#ifdef PC98
|
||||
outb(IO_ICU2+ICU_IMR_OFFSET,9); /* 8086 mode */
|
||||
#else /* IBM-PC */
|
||||
#ifdef AUTO_EOI_2
|
||||
outb(IO_ICU2+1, 2 | 1); /* auto EOI, 8086 mode */
|
||||
outb(IO_ICU2+ICU_IMR_OFFSET, 2 | 1); /* auto EOI, 8086 mode */
|
||||
#else
|
||||
outb(IO_ICU2+1,1); /* 8086 mode */
|
||||
outb(IO_ICU2+ICU_IMR_OFFSET,1); /* 8086 mode */
|
||||
#endif
|
||||
outb(IO_ICU2+1, 0xff); /* leave interrupts masked */
|
||||
#endif /* PC98 */
|
||||
outb(IO_ICU2+ICU_IMR_OFFSET, 0xff); /* leave interrupts masked */
|
||||
outb(IO_ICU2, 0x0a); /* default to IRR on read */
|
||||
}
|
||||
|
||||
|
|
@ -263,7 +312,7 @@ update_intr_masks(void)
|
|||
#if defined(APIC_IO)
|
||||
/* no 8259 SLAVE to ignore */
|
||||
#else
|
||||
if (intr==2) continue; /* ignore 8259 SLAVE output */
|
||||
if (intr==ICU_SLAVEID) continue; /* ignore 8259 SLAVE output */
|
||||
#endif /* APIC_IO */
|
||||
maskptr = intr_mptr[intr];
|
||||
if (!maskptr) continue;
|
||||
|
|
@ -360,7 +409,7 @@ icu_setup(int intr, inthand2_t *handler, void *arg, u_int *maskptr, int flags)
|
|||
#if defined(APIC_IO)
|
||||
if ((u_int)intr >= ICU_LEN) /* no 8259 SLAVE to ignore */
|
||||
#else
|
||||
if ((u_int)intr >= ICU_LEN || intr == 2)
|
||||
if ((u_int)intr >= ICU_LEN || intr == ICU_SLAVEID)
|
||||
#endif /* APIC_IO */
|
||||
if (intr_handler[intr] != isa_strayintr)
|
||||
return (EBUSY);
|
||||
|
|
|
|||
|
|
@ -34,7 +34,7 @@
|
|||
* SUCH DAMAGE.
|
||||
*
|
||||
* from: @(#)isa.c 7.2 (Berkeley) 5/13/91
|
||||
* $Id: isa.c,v 1.85 1997/05/26 14:42:24 se Exp $
|
||||
* $Id: intr_machdep.c,v 1.1 1997/06/02 08:19:04 dfr Exp $
|
||||
*/
|
||||
|
||||
#include "opt_auto_eoi.h"
|
||||
|
|
@ -55,7 +55,13 @@
|
|||
#include <vm/vm_param.h>
|
||||
#include <vm/pmap.h>
|
||||
#include <i386/isa/isa_device.h>
|
||||
#ifdef PC98
|
||||
#include <pc98/pc98/pc98.h>
|
||||
#include <pc98/pc98/pc98_machdep.h>
|
||||
#include <pc98/pc98/epsonio.h>
|
||||
#else
|
||||
#include <i386/isa/isa.h>
|
||||
#endif
|
||||
#include <i386/isa/icu.h>
|
||||
#include <i386/isa/ic/i8237.h>
|
||||
#include "vector.h"
|
||||
|
|
@ -63,6 +69,15 @@
|
|||
#include <i386/isa/intr_machdep.h>
|
||||
#include <sys/interrupt.h>
|
||||
|
||||
/* XXX should be in suitable include files */
|
||||
#ifdef PC98
|
||||
#define ICU_IMR_OFFSET 2 /* IO_ICU{1,2} + 2 */
|
||||
#define ICU_SLAVEID 7
|
||||
#else
|
||||
#define ICU_IMR_OFFSET 1 /* IO_ICU{1,2} + 1 */
|
||||
#define ICU_SLAVEID 2
|
||||
#endif
|
||||
|
||||
#ifdef APIC_IO
|
||||
/*
|
||||
* This is to accommodate "mixed-mode" programming for
|
||||
|
|
@ -107,11 +122,16 @@ static inthand_t *slowintr[ICU_LEN] = {
|
|||
|
||||
static inthand2_t isa_strayintr;
|
||||
|
||||
#ifdef PC98
|
||||
#define NMI_PARITY 0x04
|
||||
#define NMI_EPARITY 0x02
|
||||
#else
|
||||
#define NMI_PARITY (1 << 7)
|
||||
#define NMI_IOCHAN (1 << 6)
|
||||
#define ENMI_WATCHDOG (1 << 7)
|
||||
#define ENMI_BUSTIMER (1 << 6)
|
||||
#define ENMI_IOSTATUS (1 << 5)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Handle a NMI, possibly a machine check.
|
||||
|
|
@ -121,6 +141,19 @@ int
|
|||
isa_nmi(cd)
|
||||
int cd;
|
||||
{
|
||||
#ifdef PC98
|
||||
int port = inb(0x33);
|
||||
if (epson_machine_id == 0x20)
|
||||
epson_outb(0xc16, epson_inb(0xc16) | 0x1);
|
||||
if (port & NMI_PARITY) {
|
||||
panic("BASE RAM parity error, likely hardware failure.");
|
||||
} else if (port & NMI_EPARITY) {
|
||||
panic("EXTENDED RAM parity error, likely hardware failure.");
|
||||
} else {
|
||||
printf("\nNMI Resume ??\n");
|
||||
return(0);
|
||||
}
|
||||
#else /* IBM-PC */
|
||||
int isa_port = inb(0x61);
|
||||
int eisa_port = inb(0x461);
|
||||
if(isa_port & NMI_PARITY) {
|
||||
|
|
@ -137,6 +170,7 @@ isa_nmi(cd)
|
|||
printf("\nNMI ISA %x, EISA %x\n", isa_port, eisa_port);
|
||||
return(0);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -154,26 +188,41 @@ isa_defaultirq()
|
|||
|
||||
/* initialize 8259's */
|
||||
outb(IO_ICU1, 0x11); /* reset; program device, four bytes */
|
||||
outb(IO_ICU1+1, NRSVIDT); /* starting at this vector index */
|
||||
outb(IO_ICU1+1, 1<<2); /* slave on line 2 */
|
||||
|
||||
outb(IO_ICU1+ICU_IMR_OFFSET, NRSVIDT); /* starting at this vector index */
|
||||
outb(IO_ICU1+ICU_IMR_OFFSET, IRQ_SLAVE); /* slave on line 7 */
|
||||
#ifdef PC98
|
||||
#ifdef AUTO_EOI_1
|
||||
outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */
|
||||
outb(IO_ICU1+ICU_IMR_OFFSET, 0x1f); /* (master) auto EOI, 8086 mode */
|
||||
#else
|
||||
outb(IO_ICU1+1, 1); /* 8086 mode */
|
||||
outb(IO_ICU1+ICU_IMR_OFFSET, 0x1d); /* (master) 8086 mode */
|
||||
#endif
|
||||
outb(IO_ICU1+1, 0xff); /* leave interrupts masked */
|
||||
#else /* IBM-PC */
|
||||
#ifdef AUTO_EOI_1
|
||||
outb(IO_ICU1+ICU_IMR_OFFSET, 2 | 1); /* auto EOI, 8086 mode */
|
||||
#else
|
||||
outb(IO_ICU1+ICU_IMR_OFFSET, 1); /* 8086 mode */
|
||||
#endif
|
||||
#endif /* PC98 */
|
||||
outb(IO_ICU1+ICU_IMR_OFFSET, 0xff); /* leave interrupts masked */
|
||||
outb(IO_ICU1, 0x0a); /* default to IRR on read */
|
||||
#ifndef PC98
|
||||
outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */
|
||||
#endif /* !PC98 */
|
||||
|
||||
outb(IO_ICU2, 0x11); /* reset; program device, four bytes */
|
||||
outb(IO_ICU2+1, NRSVIDT+8); /* staring at this vector index */
|
||||
outb(IO_ICU2+1,2); /* my slave id is 2 */
|
||||
outb(IO_ICU2+ICU_IMR_OFFSET, NRSVIDT+8); /* staring at this vector index */
|
||||
outb(IO_ICU2+ICU_IMR_OFFSET, ICU_SLAVEID); /* my slave id is 7 */
|
||||
#ifdef PC98
|
||||
outb(IO_ICU2+ICU_IMR_OFFSET,9); /* 8086 mode */
|
||||
#else /* IBM-PC */
|
||||
#ifdef AUTO_EOI_2
|
||||
outb(IO_ICU2+1, 2 | 1); /* auto EOI, 8086 mode */
|
||||
outb(IO_ICU2+ICU_IMR_OFFSET, 2 | 1); /* auto EOI, 8086 mode */
|
||||
#else
|
||||
outb(IO_ICU2+1,1); /* 8086 mode */
|
||||
outb(IO_ICU2+ICU_IMR_OFFSET,1); /* 8086 mode */
|
||||
#endif
|
||||
outb(IO_ICU2+1, 0xff); /* leave interrupts masked */
|
||||
#endif /* PC98 */
|
||||
outb(IO_ICU2+ICU_IMR_OFFSET, 0xff); /* leave interrupts masked */
|
||||
outb(IO_ICU2, 0x0a); /* default to IRR on read */
|
||||
}
|
||||
|
||||
|
|
@ -263,7 +312,7 @@ update_intr_masks(void)
|
|||
#if defined(APIC_IO)
|
||||
/* no 8259 SLAVE to ignore */
|
||||
#else
|
||||
if (intr==2) continue; /* ignore 8259 SLAVE output */
|
||||
if (intr==ICU_SLAVEID) continue; /* ignore 8259 SLAVE output */
|
||||
#endif /* APIC_IO */
|
||||
maskptr = intr_mptr[intr];
|
||||
if (!maskptr) continue;
|
||||
|
|
@ -360,7 +409,7 @@ icu_setup(int intr, inthand2_t *handler, void *arg, u_int *maskptr, int flags)
|
|||
#if defined(APIC_IO)
|
||||
if ((u_int)intr >= ICU_LEN) /* no 8259 SLAVE to ignore */
|
||||
#else
|
||||
if ((u_int)intr >= ICU_LEN || intr == 2)
|
||||
if ((u_int)intr >= ICU_LEN || intr == ICU_SLAVEID)
|
||||
#endif /* APIC_IO */
|
||||
if (intr_handler[intr] != isa_strayintr)
|
||||
return (EBUSY);
|
||||
|
|
|
|||
Loading…
Reference in New Issue