Make the fxp driver work on alpha, rather than panic the machine on boot
and/or when using the card. o Convert the driver to using bus_space. This allows alphas with fxp's to boot, rather than panic'ing because rman_get_virtual() doesn't really return a virtual address on alphas. o Fix an alpha unaligned access error caused by some misfeature of gcc/egcs: if link_addr & rbd_addr in the fxp_rfa struct are 32 bit quantities, egcs will assume they are naturally aligned. So it will do a ldl & some shifty/masky to twiddle 16 bit values in fxp_lwcopy(). However, if they are 16-bit aligned, the ldl will actually be done on a 16-bit aligned value & we will panic with an unaligned access error... Changing their definition to an array of chars seems to fix this. I obtained this from NetBSD. I've tested this on both i386 & alpha.
This commit is contained in:
Andrew Gallatin
parent
394b3be19e
commit
4fc1dda91d
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@ -76,11 +76,6 @@
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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#ifdef __alpha__ /* XXX */
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/* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */
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#undef vtophys
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#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va))
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#endif /* __alpha__ */
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#else /* __FreeBSD__ */
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@ -104,6 +99,13 @@
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#endif /* __NetBSD__ */
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#ifdef __alpha__ /* XXX */
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/* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */
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#undef vtophys
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#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va))
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#endif /* __alpha__ */
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#include "opt_bdg.h"
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#ifdef BRIDGE
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#include <net/if_types.h>
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@ -541,7 +543,9 @@ fxp_attach(device_t dev)
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error = ENXIO;
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goto fail;
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}
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sc->csr = rman_get_virtual(sc->mem); /* XXX use bus_space */
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sc->sc_st = rman_get_bustag(sc->mem);
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sc->sc_sh = rman_get_bushandle(sc->mem);
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/*
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* Allocate our interrupt.
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@ -1704,20 +1708,21 @@ fxp_add_rfabuf(sc, oldm)
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*/
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rfa = mtod(m, struct fxp_rfa *);
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m->m_data += sizeof(struct fxp_rfa);
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rfa->size = MCLBYTES - sizeof(struct fxp_rfa) - RFA_ALIGNMENT_FUDGE;
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rfa->size = (u_int16_t)(MCLBYTES - sizeof(struct fxp_rfa) - RFA_ALIGNMENT_FUDGE);
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/*
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* Initialize the rest of the RFA. Note that since the RFA
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* is misaligned, we cannot store values directly. Instead,
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* we use an optimized, inline copy.
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*/
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rfa->rfa_status = 0;
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rfa->rfa_control = FXP_RFA_CONTROL_EL;
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rfa->actual_size = 0;
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v = -1;
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fxp_lwcopy(&v, &rfa->link_addr);
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fxp_lwcopy(&v, &rfa->rbd_addr);
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fxp_lwcopy(&v, (volatile u_int32_t *) rfa->link_addr);
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fxp_lwcopy(&v, (volatile u_int32_t *) rfa->rbd_addr);
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/*
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* If there are other buffers already on the list, attach this
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@ -1728,7 +1733,7 @@ fxp_add_rfabuf(sc, oldm)
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RFA_ALIGNMENT_FUDGE);
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sc->rfa_tailm->m_next = m;
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v = vtophys(rfa);
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fxp_lwcopy(&v, &p_rfa->link_addr);
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fxp_lwcopy(&v, (volatile u_int32_t *) p_rfa->link_addr);
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p_rfa->rfa_control &= ~FXP_RFA_CONTROL_EL;
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} else {
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sc->rfa_headm = m;
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@ -245,8 +245,8 @@ struct fxp_cb_tx {
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struct fxp_rfa {
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volatile u_int16_t rfa_status;
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volatile u_int16_t rfa_control;
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volatile u_int32_t link_addr;
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volatile u_int32_t rbd_addr;
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volatile u_int8_t link_addr[4];
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volatile u_int8_t rbd_addr[4];
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volatile u_int16_t actual_size;
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volatile u_int16_t size;
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};
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@ -42,16 +42,15 @@ struct fxp_softc {
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#if defined(__NetBSD__)
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struct device sc_dev; /* generic device structures */
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void *sc_ih; /* interrupt handler cookie */
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bus_space_tag_t sc_st; /* bus space tag */
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bus_space_handle_t sc_sh; /* bus space handle */
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struct ethercom sc_ethercom; /* ethernet common part */
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#else
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struct arpcom arpcom; /* per-interface network data */
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caddr_t csr; /* control/status registers */
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struct resource *mem; /* resource descriptor for registers */
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struct resource *irq; /* resource descriptor for interrupt */
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void *ih; /* interrupt handler cookie */
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#endif /* __NetBSD__ */
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bus_space_tag_t sc_st; /* bus space tag */
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bus_space_handle_t sc_sh; /* bus space handle */
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struct mbuf *rfa_headm; /* first mbuf in receive frame area */
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struct mbuf *rfa_tailm; /* last mbuf in receive frame area */
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struct fxp_cb_tx *cbl_first; /* first active TxCB in list */
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@ -71,7 +70,6 @@ struct fxp_softc {
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};
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/* Macros to ease CSR access. */
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#if defined(__NetBSD__)
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#define CSR_READ_1(sc, reg) \
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bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg))
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#define CSR_READ_2(sc, reg) \
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@ -84,20 +82,6 @@ struct fxp_softc {
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bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
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#define CSR_WRITE_4(sc, reg, val) \
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bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
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#else
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#define CSR_READ_1(sc, reg) \
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(*((u_int8_t *)((sc)->csr + (reg))))
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#define CSR_READ_2(sc, reg) \
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(*((u_int16_t *)((sc)->csr + (reg))))
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#define CSR_READ_4(sc, reg) \
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(*((u_int32_t *)((sc)->csr + (reg))))
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#define CSR_WRITE_1(sc, reg, val) \
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(*((u_int8_t *)((sc)->csr + (reg)))) = (val)
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#define CSR_WRITE_2(sc, reg, val) \
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(*((u_int16_t *)((sc)->csr + (reg)))) = (val)
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#define CSR_WRITE_4(sc, reg, val) \
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(*((u_int32_t *)((sc)->csr + (reg)))) = (val)
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#endif /* __NetBSD__ */
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/* Deal with slight differences in software interfaces. */
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#if defined(__NetBSD__)
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@ -76,11 +76,6 @@
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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#ifdef __alpha__ /* XXX */
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/* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */
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#undef vtophys
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#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va))
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#endif /* __alpha__ */
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#else /* __FreeBSD__ */
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@ -104,6 +99,13 @@
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#endif /* __NetBSD__ */
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#ifdef __alpha__ /* XXX */
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/* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */
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#undef vtophys
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#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va))
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#endif /* __alpha__ */
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#include "opt_bdg.h"
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#ifdef BRIDGE
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#include <net/if_types.h>
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@ -541,7 +543,9 @@ fxp_attach(device_t dev)
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error = ENXIO;
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goto fail;
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}
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sc->csr = rman_get_virtual(sc->mem); /* XXX use bus_space */
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sc->sc_st = rman_get_bustag(sc->mem);
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sc->sc_sh = rman_get_bushandle(sc->mem);
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/*
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* Allocate our interrupt.
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@ -1704,20 +1708,21 @@ fxp_add_rfabuf(sc, oldm)
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*/
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rfa = mtod(m, struct fxp_rfa *);
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m->m_data += sizeof(struct fxp_rfa);
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rfa->size = MCLBYTES - sizeof(struct fxp_rfa) - RFA_ALIGNMENT_FUDGE;
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rfa->size = (u_int16_t)(MCLBYTES - sizeof(struct fxp_rfa) - RFA_ALIGNMENT_FUDGE);
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/*
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* Initialize the rest of the RFA. Note that since the RFA
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* is misaligned, we cannot store values directly. Instead,
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* we use an optimized, inline copy.
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*/
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rfa->rfa_status = 0;
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rfa->rfa_control = FXP_RFA_CONTROL_EL;
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rfa->actual_size = 0;
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v = -1;
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fxp_lwcopy(&v, &rfa->link_addr);
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fxp_lwcopy(&v, &rfa->rbd_addr);
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fxp_lwcopy(&v, (volatile u_int32_t *) rfa->link_addr);
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fxp_lwcopy(&v, (volatile u_int32_t *) rfa->rbd_addr);
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/*
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* If there are other buffers already on the list, attach this
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@ -1728,7 +1733,7 @@ fxp_add_rfabuf(sc, oldm)
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RFA_ALIGNMENT_FUDGE);
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sc->rfa_tailm->m_next = m;
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v = vtophys(rfa);
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fxp_lwcopy(&v, &p_rfa->link_addr);
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fxp_lwcopy(&v, (volatile u_int32_t *) p_rfa->link_addr);
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p_rfa->rfa_control &= ~FXP_RFA_CONTROL_EL;
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} else {
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sc->rfa_headm = m;
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@ -245,8 +245,8 @@ struct fxp_cb_tx {
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struct fxp_rfa {
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volatile u_int16_t rfa_status;
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volatile u_int16_t rfa_control;
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volatile u_int32_t link_addr;
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volatile u_int32_t rbd_addr;
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volatile u_int8_t link_addr[4];
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volatile u_int8_t rbd_addr[4];
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volatile u_int16_t actual_size;
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volatile u_int16_t size;
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};
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@ -42,16 +42,15 @@ struct fxp_softc {
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#if defined(__NetBSD__)
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struct device sc_dev; /* generic device structures */
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void *sc_ih; /* interrupt handler cookie */
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bus_space_tag_t sc_st; /* bus space tag */
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bus_space_handle_t sc_sh; /* bus space handle */
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struct ethercom sc_ethercom; /* ethernet common part */
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#else
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struct arpcom arpcom; /* per-interface network data */
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caddr_t csr; /* control/status registers */
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struct resource *mem; /* resource descriptor for registers */
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struct resource *irq; /* resource descriptor for interrupt */
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void *ih; /* interrupt handler cookie */
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#endif /* __NetBSD__ */
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bus_space_tag_t sc_st; /* bus space tag */
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bus_space_handle_t sc_sh; /* bus space handle */
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struct mbuf *rfa_headm; /* first mbuf in receive frame area */
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struct mbuf *rfa_tailm; /* last mbuf in receive frame area */
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struct fxp_cb_tx *cbl_first; /* first active TxCB in list */
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@ -71,7 +70,6 @@ struct fxp_softc {
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};
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/* Macros to ease CSR access. */
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#if defined(__NetBSD__)
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#define CSR_READ_1(sc, reg) \
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bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg))
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#define CSR_READ_2(sc, reg) \
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@ -84,20 +82,6 @@ struct fxp_softc {
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bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
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#define CSR_WRITE_4(sc, reg, val) \
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bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
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#else
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#define CSR_READ_1(sc, reg) \
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(*((u_int8_t *)((sc)->csr + (reg))))
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#define CSR_READ_2(sc, reg) \
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(*((u_int16_t *)((sc)->csr + (reg))))
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#define CSR_READ_4(sc, reg) \
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(*((u_int32_t *)((sc)->csr + (reg))))
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#define CSR_WRITE_1(sc, reg, val) \
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(*((u_int8_t *)((sc)->csr + (reg)))) = (val)
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#define CSR_WRITE_2(sc, reg, val) \
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(*((u_int16_t *)((sc)->csr + (reg)))) = (val)
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#define CSR_WRITE_4(sc, reg, val) \
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(*((u_int32_t *)((sc)->csr + (reg)))) = (val)
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#endif /* __NetBSD__ */
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/* Deal with slight differences in software interfaces. */
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#if defined(__NetBSD__)
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