generate .sets for variables used in asm and C that are stored in per-cpu
space under SMP.
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Peter Wemm
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/*-
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* Copyright (c) Peter Wemm <peter@netplex.com.au>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id$
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*/
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#include <machine/asmacros.h>
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#include <machine/pmap.h>
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#include "assym.s"
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#ifdef SMP
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/*
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* Define layout of per-cpu address space.
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* This is "constructed" in locore.s on the BSP and in mp_machdep.c
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* for each AP. DO NOT REORDER THESE WITHOUT UPDATING THE REST!
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*/
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.globl _SMP_prvstart
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.set _SMP_prvstart,(MPPTDI << PDRSHIFT)
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.globl globaldata,_SMP_prvpt,_lapic,_SMP_ioapic
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.globl _prv_CPAGE1,_prv_CPAGE2,_prv_CPAGE3
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.globl _idlestack,_idlestack_top
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.set globaldata,_SMP_prvstart + PS_GLOBALDATA
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.set _SMP_prvpt,_SMP_prvstart + PS_PRVPT
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.set _lapic,_SMP_prvstart + PS_LAPIC
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.set _idlestack,_SMP_prvstart + PS_IDLESTACK
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.set _idlestack_top,_SMP_prvstart + PS_IDLESTACK_TOP
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.set _prv_CPAGE1,_SMP_prvstart + PS_CPAGE1
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.set _prv_CPAGE2,_SMP_prvstart + PS_CPAGE2
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.set _prv_CPAGE3,_SMP_prvstart + PS_CPAGE3
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.set _SMP_ioapic,_SMP_prvstart + PS_IOAPICS
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#endif
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/*
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* Define layout of the global data. On SMP this lives in
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* the per-cpu address space, otherwise it's in the data segment.
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*/
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#ifndef SMP
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.data
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ALIGN_DATA
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globaldata:
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.space GD_SIZEOF /* in data segment */
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#endif
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.globl _curproc,_curpcb,_npxproc,_common_tss
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.set _curproc,globaldata + GD_CURPROC
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.set _curpcb,globaldata + GD_CURPCB
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.set _npxproc,globaldata + GD_NPXPROC
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.set _common_tss,globaldata + GD_COMMON_TSS
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#ifdef VM86
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.globl _common_tssd,_private_tss
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.set _common_tssd,globaldata + GD_COMMON_TSSD
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.set _private_tss,globaldata + GD_PRIVATE_TSS
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#endif
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#ifdef SMP
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/*
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* The BSP version of these get setup in locore.s and pmap.c, while
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* the AP versions are setup in mp_machdep.c.
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*/
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.globl _cpuid,_cpu_lockid,_other_cpus,_my_idlePTD,_ss_tpr
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.globl _prv_CMAP1,_prv_CMAP2,_prv_CMAP3
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.globl _inside_intr
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.set _cpuid,globaldata + GD_CPUID
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.set _cpu_lockid,globaldata + GD_CPU_LOCKID
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.set _other_cpus,globaldata + GD_OTHER_CPUS
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.set _my_idlePTD,globaldata + GD_MY_IDLEPTD
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.set _ss_tpr,globaldata + GD_SS_TPR
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.set _prv_CMAP1,globaldata + GD_PRV_CMAP1
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.set _prv_CMAP2,globaldata + GD_PRV_CMAP2
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.set _prv_CMAP3,globaldata + GD_PRV_CMAP3
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.set _inside_intr,globaldata + GD_INSIDE_INTR
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#ifdef VM86
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.globl _my_tr
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.set _my_tr,globaldata + GD_MY_TR
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#endif
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#endif
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#if defined(SMP) || defined(APIC_IO)
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.globl lapic_eoi, lapic_svr, lapic_tpr, lapic_irr1, lapic_ver
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.globl lapic_icr_lo,lapic_icr_hi,lapic_isr1
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/*
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* Do not clutter our namespace with these unless we need them in other
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* assembler code. The C code uses different definitions.
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*/
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#if 0
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.globl lapic_id,lapic_ver,lapic_tpr,lapic_apr,lapic_ppr,lapic_eoi
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.globl lapic_ldr,lapic_dfr,lapic_svr,lapic_isr,lapic_isr0
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.globl lapic_isr2,lapic_isr3,lapic_isr4,lapic_isr5,lapic_isr6
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.globl lapic_isr7,lapic_tmr,lapic_tmr0,lapic_tmr1,lapic_tmr2
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.globl lapic_tmr3,lapic_tmr4,lapic_tmr5,lapic_tmr6,lapic_tmr7
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.globl lapic_irr,lapic_irr0,lapic_irr1,lapic_irr2,lapic_irr3
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.globl lapic_irr4,lapic_irr5,lapic_irr6,lapic_irr7,lapic_esr
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.globl lapic_lvtt,lapic_pcint,lapic_lvt1
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.globl lapic_lvt2,lapic_lvt3,lapic_ticr,lapic_tccr,lapic_tdcr
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#endif
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.set lapic_id, _lapic + 0x020
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.set lapic_ver, _lapic + 0x030
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.set lapic_tpr, _lapic + 0x080
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.set lapic_apr, _lapic + 0x090
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.set lapic_ppr, _lapic + 0x0a0
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.set lapic_eoi, _lapic + 0x0b0
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.set lapic_ldr, _lapic + 0x0d0
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.set lapic_dfr, _lapic + 0x0e0
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.set lapic_svr, _lapic + 0x0f0
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.set lapic_isr, _lapic + 0x100
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.set lapic_isr0, _lapic + 0x100
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.set lapic_isr1, _lapic + 0x110
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.set lapic_isr2, _lapic + 0x120
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.set lapic_isr3, _lapic + 0x130
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.set lapic_isr4, _lapic + 0x140
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.set lapic_isr5, _lapic + 0x150
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.set lapic_isr6, _lapic + 0x160
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.set lapic_isr7, _lapic + 0x170
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.set lapic_tmr, _lapic + 0x180
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.set lapic_tmr0, _lapic + 0x180
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.set lapic_tmr1, _lapic + 0x190
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.set lapic_tmr2, _lapic + 0x1a0
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.set lapic_tmr3, _lapic + 0x1b0
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.set lapic_tmr4, _lapic + 0x1c0
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.set lapic_tmr5, _lapic + 0x1d0
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.set lapic_tmr6, _lapic + 0x1e0
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.set lapic_tmr7, _lapic + 0x1f0
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.set lapic_irr, _lapic + 0x200
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.set lapic_irr0, _lapic + 0x200
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.set lapic_irr1, _lapic + 0x210
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.set lapic_irr2, _lapic + 0x220
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.set lapic_irr3, _lapic + 0x230
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.set lapic_irr4, _lapic + 0x240
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.set lapic_irr5, _lapic + 0x250
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.set lapic_irr6, _lapic + 0x260
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.set lapic_irr7, _lapic + 0x270
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.set lapic_esr, _lapic + 0x280
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.set lapic_icr_lo, _lapic + 0x300
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.set lapic_icr_hi, _lapic + 0x310
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.set lapic_lvtt, _lapic + 0x320
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.set lapic_pcint, _lapic + 0x340
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.set lapic_lvt1, _lapic + 0x350
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.set lapic_lvt2, _lapic + 0x360
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.set lapic_lvt3, _lapic + 0x370
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.set lapic_ticr, _lapic + 0x380
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.set lapic_tccr, _lapic + 0x390
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.set lapic_tdcr, _lapic + 0x3e0
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#endif
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