Add workaround for CRC errors seen at 100Mbps on JMC250 A2.

While here update chip revision number of JMC250/JMC260 from the
latest datasheet.
This commit is contained in:
Pyun YongHyeon 2008-09-09 10:19:48 +00:00
parent 9b45b70125
commit 8de8f265b6
2 changed files with 16 additions and 2 deletions

View File

@ -1996,6 +1996,19 @@ jme_mac_config(struct jme_softc *sc)
default:
break;
}
/* Workaround CRC errors at 100Mbps on JMC250 A2. */
if (sc->jme_rev == DEVICEID_JMC250 &&
sc->jme_chip_rev == DEVICEREVID_JMC250_A2) {
if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX) {
/* Extend interface FIFO depth. */
jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr,
0x1B, 0x0000);
} else {
/* Select default interface FIFO depth. */
jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr,
0x1B, 0x0004);
}
}
CSR_WRITE_4(sc, JME_GHC, ghc);
CSR_WRITE_4(sc, JME_RXMAC, rxmac);
CSR_WRITE_4(sc, JME_TXMAC, txmac);

View File

@ -39,13 +39,14 @@
* JMC250 PCI device ID
*/
#define DEVICEID_JMC250 0x0250
#define DEVICEREVID_JMC250 0x10
#define DEVICEREVID_JMC250_A0 0x00
#define DEVICEREVID_JMC250_A2 0x11
/*
* JMC260 PCI device ID
*/
#define DEVICEID_JMC260 0x0260
#define DEVICEREVID_JMC260 0x20
#define DEVICEREVID_JMC260_A0 0x00
/* JMC250 PCI configuration register. */
#define JME_PCI_BAR0 0x10 /* 16KB memory window. */