Add a memory barrier for PREWRITE operations to ensure all writes by the

CPU have drained before further writes to kick off the operation.

MFC after:	1 week

sys/alpha/alpha/busdma_machdep.c

@@ -891,6 +891,10 @@ _bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
 			}
 		}
 	}
+
+	/* Ensure any pending writes have drained. */
+	if (op & (BUS_DMASYNC_PREWRITE))
+		alpha_mb();
 }
 
 static void