Add new cpu type, CPU_CY486DX, which shows Cyrix 486S/DX series CPUs,
and initialization routine for those CPUs. Tested by: Bob Bishop <rb@gid.co.uk>
This commit is contained in:
KATO Takenori
parent
fc8cbbc9b7
commit
9ca8226735
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@ -36,7 +36,7 @@
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* SUCH DAMAGE.
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*
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* from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp
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* $Id: identcpu.c,v 1.14 1997/03/22 18:51:57 kato Exp $
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* $Id: identcpu.c,v 1.15 1997/04/22 06:55:23 jdp Exp $
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*/
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#include "opt_cpu.h"
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@ -89,6 +89,7 @@ static struct cpu_nameclass i386_cpus[] = {
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{ "Blue Lightning", CPUCLASS_486 }, /* CPU_BLUE */
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{ "Cyrix 6x86 MMX", CPUCLASS_586 }, /* CPU_M2 (XXX) */
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{ "NexGen 586", CPUCLASS_386 }, /* CPU_NX586 (XXX) */
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{ "Cyrix 486S/DX", CPUCLASS_486 }, /* CPU_CY486DX */
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};
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void
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@ -536,10 +537,12 @@ finishidentcpu(void)
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*/
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switch (cyrix_did & 0x00f0) {
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case 0x00:
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case 0x10:
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case 0xf0:
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cpu = CPU_486DLC;
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break;
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case 0x10:
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cpu = CPU_CY486DX;
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break;
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case 0x20:
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if ((cyrix_did & 0x00f0) < 8)
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cpu = CPU_M1;
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@ -26,7 +26,7 @@
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: initcpu.c,v 1.2 1997/03/24 07:23:05 kato Exp $
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* $Id: initcpu.c,v 1.3 1997/04/19 05:25:19 kato Exp $
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*/
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#include "opt_cpu.h"
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@ -45,6 +45,7 @@ void initializecpu(void);
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static void init_5x86(void);
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static void init_bluelightning(void);
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static void init_486dlc(void);
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static void init_cy486dx(void);
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#ifdef CPU_I486_ON_386
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static void init_i486_on_386(void);
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#endif
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@ -90,7 +91,7 @@ init_bluelightning(void)
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}
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/*
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* Cyrix 486 series
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* Cyrix 486SLC/DLC/SR/DR series
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*/
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static void
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init_486dlc(void)
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@ -132,6 +133,28 @@ init_486dlc(void)
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}
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/*
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* Cyrix 486S/DX series
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*/
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static void
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init_cy486dx(void)
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{
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u_long eflags;
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u_char ccr2;
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eflags = read_eflags();
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disable_intr();
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invd();
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ccr2 = read_cyrix_reg(CCR2);
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#ifdef SUSP_HLT
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ccr2 |= CCR2_SUSP_HTL;
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#endif
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write_cyrix_reg(CCR2, ccr2);
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write_eflags(eflags);
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}
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/*
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* Cyrix 5x86
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*/
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@ -334,6 +357,9 @@ initializecpu(void)
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case CPU_486DLC:
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init_486dlc();
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break;
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case CPU_CY486DX:
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init_cy486dx();
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break;
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case CPU_M1SC:
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init_5x86();
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break;
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@ -407,7 +433,7 @@ DB_SHOW_COMMAND(cyrixreg, cyrixreg)
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disable_intr();
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if (cpu != CPU_M1SC) {
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if ((cpu != CPU_M1SC) && (cpu != CPU_CY486DX)) {
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ccr0 = read_cyrix_reg(CCR0);
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}
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ccr1 = read_cyrix_reg(CCR1);
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@ -424,7 +450,7 @@ DB_SHOW_COMMAND(cyrixreg, cyrixreg)
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}
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write_eflags(eflags);
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if (cpu != CPU_M1SC)
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if ((cpu != CPU_M1SC) && (cpu != CPU_CY486DX))
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printf("CCR0=%x, ", (u_int)ccr0);
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printf("CCR1=%x, CCR2=%x, CCR3=%x",
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@ -24,7 +24,7 @@
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: cputypes.h,v 1.7 1997/02/22 09:34:14 peter Exp $
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* $Id: cputypes.h,v 1.8 1997/03/22 18:53:03 kato Exp $
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*/
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#ifndef _MACHINE_CPUTYPES_H_
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@ -57,4 +57,5 @@
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#define CPU_BLUE 10 /* IBM BlueLighting CPU */
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#define CPU_M2 11 /* Cyrix M2 (aka enhanced 6x86 with MMX */
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#define CPU_NX586 12 /* NexGen (now AMD) 586 */
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#define CPU_CY486DX 13 /* Cyrix 486S/DX/DX2/DX4 */
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#endif /* _MACHINE_CPUTYPES_H_ */
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@ -36,7 +36,7 @@
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* SUCH DAMAGE.
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*
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* from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp
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* $Id: identcpu.c,v 1.14 1997/03/22 18:51:57 kato Exp $
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* $Id: identcpu.c,v 1.15 1997/04/22 06:55:23 jdp Exp $
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*/
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#include "opt_cpu.h"
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@ -89,6 +89,7 @@ static struct cpu_nameclass i386_cpus[] = {
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{ "Blue Lightning", CPUCLASS_486 }, /* CPU_BLUE */
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{ "Cyrix 6x86 MMX", CPUCLASS_586 }, /* CPU_M2 (XXX) */
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{ "NexGen 586", CPUCLASS_386 }, /* CPU_NX586 (XXX) */
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{ "Cyrix 486S/DX", CPUCLASS_486 }, /* CPU_CY486DX */
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};
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void
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@ -536,10 +537,12 @@ finishidentcpu(void)
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*/
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switch (cyrix_did & 0x00f0) {
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case 0x00:
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case 0x10:
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case 0xf0:
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cpu = CPU_486DLC;
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break;
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case 0x10:
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cpu = CPU_CY486DX;
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break;
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case 0x20:
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if ((cyrix_did & 0x00f0) < 8)
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cpu = CPU_M1;
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@ -26,7 +26,7 @@
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: initcpu.c,v 1.2 1997/03/24 07:23:05 kato Exp $
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* $Id: initcpu.c,v 1.3 1997/04/19 05:25:19 kato Exp $
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*/
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#include "opt_cpu.h"
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@ -45,6 +45,7 @@ void initializecpu(void);
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static void init_5x86(void);
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static void init_bluelightning(void);
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static void init_486dlc(void);
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static void init_cy486dx(void);
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#ifdef CPU_I486_ON_386
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static void init_i486_on_386(void);
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#endif
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@ -90,7 +91,7 @@ init_bluelightning(void)
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}
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/*
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* Cyrix 486 series
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* Cyrix 486SLC/DLC/SR/DR series
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*/
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static void
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init_486dlc(void)
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@ -132,6 +133,28 @@ init_486dlc(void)
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}
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/*
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* Cyrix 486S/DX series
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*/
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static void
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init_cy486dx(void)
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{
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u_long eflags;
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u_char ccr2;
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eflags = read_eflags();
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disable_intr();
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invd();
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ccr2 = read_cyrix_reg(CCR2);
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#ifdef SUSP_HLT
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ccr2 |= CCR2_SUSP_HTL;
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#endif
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write_cyrix_reg(CCR2, ccr2);
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write_eflags(eflags);
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}
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/*
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* Cyrix 5x86
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*/
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@ -334,6 +357,9 @@ initializecpu(void)
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case CPU_486DLC:
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init_486dlc();
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break;
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case CPU_CY486DX:
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init_cy486dx();
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break;
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case CPU_M1SC:
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init_5x86();
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break;
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@ -407,7 +433,7 @@ DB_SHOW_COMMAND(cyrixreg, cyrixreg)
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disable_intr();
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if (cpu != CPU_M1SC) {
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if ((cpu != CPU_M1SC) && (cpu != CPU_CY486DX)) {
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ccr0 = read_cyrix_reg(CCR0);
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}
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ccr1 = read_cyrix_reg(CCR1);
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@ -424,7 +450,7 @@ DB_SHOW_COMMAND(cyrixreg, cyrixreg)
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}
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write_eflags(eflags);
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if (cpu != CPU_M1SC)
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if ((cpu != CPU_M1SC) && (cpu != CPU_CY486DX))
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printf("CCR0=%x, ", (u_int)ccr0);
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printf("CCR1=%x, CCR2=%x, CCR3=%x",
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@ -24,7 +24,7 @@
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: cputypes.h,v 1.7 1997/02/22 09:34:14 peter Exp $
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* $Id: cputypes.h,v 1.8 1997/03/22 18:53:03 kato Exp $
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*/
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#ifndef _MACHINE_CPUTYPES_H_
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@ -57,4 +57,5 @@
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#define CPU_BLUE 10 /* IBM BlueLighting CPU */
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#define CPU_M2 11 /* Cyrix M2 (aka enhanced 6x86 with MMX */
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#define CPU_NX586 12 /* NexGen (now AMD) 586 */
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#define CPU_CY486DX 13 /* Cyrix 486S/DX/DX2/DX4 */
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#endif /* _MACHINE_CPUTYPES_H_ */
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