Restore igb(4) code dropped during iflib conversion
- restore newer code for vf, i350, i210, i211 - restore dmac init code for i354 and i350 - restore WUC/WUFC update - check for igb mac type before attempting trying to assert a media changed event. - handle link events for igb(4) and em(4) devices differently and appropriately for their respective model types. Submitted by: Matt Macy <mmacy@mattmacy.io> Sponsored by: Limelight Networks
This commit is contained in:
Sean Bruno
parent
256054fd9e
commit
d8c2808fcf
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@ -1025,7 +1025,7 @@ em_if_attach_post(if_ctx_t ctx)
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/* Non-AMT based hardware can now take control from firmware */
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if (adapter->has_manage && !adapter->has_amt)
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em_get_hw_control(adapter);
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INIT_DEBUGOUT("em_if_attach_post: end");
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return (error);
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@ -1691,8 +1691,9 @@ em_if_update_admin_status(if_ctx_t ctx)
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struct e1000_hw *hw = &adapter->hw;
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struct ifnet *ifp = iflib_get_ifp(ctx);
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device_t dev = iflib_get_dev(ctx);
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u32 link_check = 0;
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u32 link_check, thstat, ctrl;
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link_check = thstat = ctrl = 0;
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/* Get the cached link value or read phy for real */
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switch (hw->phy.media_type) {
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case e1000_media_type_copper:
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@ -1717,11 +1718,21 @@ em_if_update_admin_status(if_ctx_t ctx)
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e1000_check_for_link(hw);
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link_check = adapter->hw.mac.serdes_has_link;
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break;
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default:
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/* VF device is type_unknown */
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case e1000_media_type_unknown:
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e1000_check_for_link(hw);
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link_check = !hw->mac.get_link_status;
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/* Fall thru */
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default:
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break;
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}
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/* Check for thermal downshift or shutdown */
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if (hw->mac.type == e1000_i350) {
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thstat = E1000_READ_REG(hw, E1000_THSTAT);
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ctrl = E1000_READ_REG(hw, E1000_CTRL_EXT);
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}
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/* Now check for a transition */
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if (link_check && (adapter->link_active == 0)) {
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e1000_get_speed_and_duplex(hw, &adapter->link_speed,
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@ -1743,6 +1754,21 @@ em_if_update_admin_status(if_ctx_t ctx)
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adapter->link_active = 1;
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adapter->smartspeed = 0;
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if_setbaudrate(ifp, adapter->link_speed * 1000000);
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if ((ctrl & E1000_CTRL_EXT_LINK_MODE_GMII) &&
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(thstat & E1000_THSTAT_LINK_THROTTLE))
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device_printf(dev, "Link: thermal downshift\n");
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/* Delay Link Up for Phy update */
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if (((hw->mac.type == e1000_i210) ||
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(hw->mac.type == e1000_i211)) &&
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(hw->phy.id == I210_I_PHY_ID))
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msec_delay(I210_LINK_DELAY);
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/* Reset if the media type changed. */
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if ((hw->dev_spec._82575.media_changed) &&
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(adapter->hw.mac.type >= igb_mac_min)) {
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hw->dev_spec._82575.media_changed = false;
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adapter->flags |= IGB_MEDIA_RESET;
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em_reset(ctx);
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}
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iflib_link_state_change(ctx, LINK_STATE_UP, ifp->if_baudrate);
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printf("Link state changed to up\n");
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} else if (!link_check && (adapter->link_active == 1)) {
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@ -2210,6 +2236,114 @@ lem_smartspeed(struct adapter *adapter)
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adapter->smartspeed = 0;
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}
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/*********************************************************************
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*
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* Initialize the DMA Coalescing feature
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*
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**********************************************************************/
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static void
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igb_init_dmac(struct adapter *adapter, u32 pba)
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{
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device_t dev = adapter->dev;
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struct e1000_hw *hw = &adapter->hw;
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u32 dmac, reg = ~E1000_DMACR_DMAC_EN;
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u16 hwm;
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u16 max_frame_size;
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if (hw->mac.type == e1000_i211)
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return;
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max_frame_size = adapter->shared->isc_max_frame_size;
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if (hw->mac.type > e1000_82580) {
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if (adapter->dmac == 0) { /* Disabling it */
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E1000_WRITE_REG(hw, E1000_DMACR, reg);
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return;
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} else
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device_printf(dev, "DMA Coalescing enabled\n");
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/* Set starting threshold */
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E1000_WRITE_REG(hw, E1000_DMCTXTH, 0);
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hwm = 64 * pba - max_frame_size / 16;
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if (hwm < 64 * (pba - 6))
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hwm = 64 * (pba - 6);
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reg = E1000_READ_REG(hw, E1000_FCRTC);
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reg &= ~E1000_FCRTC_RTH_COAL_MASK;
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reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
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& E1000_FCRTC_RTH_COAL_MASK);
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E1000_WRITE_REG(hw, E1000_FCRTC, reg);
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dmac = pba - max_frame_size / 512;
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if (dmac < pba - 10)
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dmac = pba - 10;
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reg = E1000_READ_REG(hw, E1000_DMACR);
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reg &= ~E1000_DMACR_DMACTHR_MASK;
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reg = ((dmac << E1000_DMACR_DMACTHR_SHIFT)
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& E1000_DMACR_DMACTHR_MASK);
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/* transition to L0x or L1 if available..*/
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reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
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/* Check if status is 2.5Gb backplane connection
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* before configuration of watchdog timer, which is
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* in msec values in 12.8usec intervals
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* watchdog timer= msec values in 32usec intervals
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* for non 2.5Gb connection
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*/
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if (hw->mac.type == e1000_i354) {
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int status = E1000_READ_REG(hw, E1000_STATUS);
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if ((status & E1000_STATUS_2P5_SKU) &&
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(!(status & E1000_STATUS_2P5_SKU_OVER)))
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reg |= ((adapter->dmac * 5) >> 6);
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else
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reg |= (adapter->dmac >> 5);
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} else {
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reg |= (adapter->dmac >> 5);
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}
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E1000_WRITE_REG(hw, E1000_DMACR, reg);
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E1000_WRITE_REG(hw, E1000_DMCRTRH, 0);
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/* Set the interval before transition */
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reg = E1000_READ_REG(hw, E1000_DMCTLX);
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if (hw->mac.type == e1000_i350)
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reg |= IGB_DMCTLX_DCFLUSH_DIS;
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/*
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** in 2.5Gb connection, TTLX unit is 0.4 usec
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** which is 0x4*2 = 0xA. But delay is still 4 usec
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*/
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if (hw->mac.type == e1000_i354) {
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int status = E1000_READ_REG(hw, E1000_STATUS);
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if ((status & E1000_STATUS_2P5_SKU) &&
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(!(status & E1000_STATUS_2P5_SKU_OVER)))
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reg |= 0xA;
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else
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reg |= 0x4;
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} else {
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reg |= 0x4;
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}
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E1000_WRITE_REG(hw, E1000_DMCTLX, reg);
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/* free space in tx packet buffer to wake from DMA coal */
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E1000_WRITE_REG(hw, E1000_DMCTXTH, (IGB_TXPBSIZE -
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(2 * max_frame_size)) >> 6);
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/* make low power state decision controlled by DMA coal */
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reg = E1000_READ_REG(hw, E1000_PCIEMISC);
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reg &= ~E1000_PCIEMISC_LX_DECISION;
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E1000_WRITE_REG(hw, E1000_PCIEMISC, reg);
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} else if (hw->mac.type == e1000_82580) {
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u32 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
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E1000_WRITE_REG(hw, E1000_PCIEMISC,
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reg & ~E1000_PCIEMISC_LX_DECISION);
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E1000_WRITE_REG(hw, E1000_DMACR, 0);
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}
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}
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static void
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em_reset(if_ctx_t ctx)
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@ -2222,6 +2356,8 @@ em_reset(if_ctx_t ctx)
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u32 pba;
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INIT_DEBUGOUT("em_reset: begin");
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/* Let the firmware know the OS is in control */
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em_get_hw_control(adapter);
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/* Set up smart power down as default off on newer adapters. */
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if (!em_smart_pwr_down && (hw->mac.type == e1000_82571 ||
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@ -2417,13 +2553,24 @@ em_reset(if_ctx_t ctx)
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/* Issue a global reset */
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e1000_reset_hw(hw);
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E1000_WRITE_REG(hw, E1000_WUFC, 0);
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em_disable_aspm(adapter);
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if (adapter->hw.mac.type >= igb_mac_min) {
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E1000_WRITE_REG(hw, E1000_WUC, 0);
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} else {
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E1000_WRITE_REG(hw, E1000_WUFC, 0);
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em_disable_aspm(adapter);
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}
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if (adapter->flags & IGB_MEDIA_RESET) {
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e1000_setup_init_funcs(hw, TRUE);
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e1000_get_bus_info(hw);
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adapter->flags &= ~IGB_MEDIA_RESET;
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}
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/* and a re-init */
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if (e1000_init_hw(hw) < 0) {
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device_printf(dev, "Hardware Initialization Failed\n");
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return;
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}
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if (adapter->hw.mac.type >= igb_mac_min)
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igb_init_dmac(adapter, pba);
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E1000_WRITE_REG(hw, E1000_VET, ETHERTYPE_VLAN);
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e1000_get_phy_info(hw);
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@ -3307,6 +3454,9 @@ em_get_hw_control(struct adapter *adapter)
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{
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u32 ctrl_ext, swsm;
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if (adapter->vf_ifp)
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return;
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if (adapter->hw.mac.type == e1000_82573) {
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swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
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E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
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@ -3317,7 +3467,6 @@ em_get_hw_control(struct adapter *adapter)
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ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
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E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
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ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
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return;
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}
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/*
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@ -235,6 +235,27 @@
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#define EM_EEPROM_APME 0x400;
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#define EM_82544_APME 0x0004;
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/* Support AutoMediaDetect for Marvell M88 PHY in i354 */
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#define IGB_MEDIA_RESET (1 << 0)
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/* Define the starting Interrupt rate per Queue */
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#define IGB_INTS_PER_SEC 8000
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#define IGB_DEFAULT_ITR ((1000000/IGB_INTS_PER_SEC) << 2)
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#define IGB_LINK_ITR 2000
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#define I210_LINK_DELAY 1000
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#define IGB_MAX_SCATTER 40
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#define IGB_VFTA_SIZE 128
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#define IGB_BR_SIZE 4096 /* ring buf size */
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#define IGB_TSO_SIZE (65535 + sizeof(struct ether_vlan_header))
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#define IGB_TSO_SEG_SIZE 4096 /* Max dma segment size */
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#define IGB_TXPBSIZE 20408
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#define IGB_HDR_BUF 128
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#define IGB_PKTTYPE_MASK 0x0000FFF0
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#define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */
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/*
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* Driver state logic for the detection of a hung state
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* in hardware. Set TX_HUNG whenever a TX packet is used
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@ -455,11 +476,11 @@ struct adapter {
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struct ifmedia *media;
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int msix;
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int if_flags;
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int min_frame_size;
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int em_insert_vlan_header;
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u32 ims;
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bool in_detach;
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u32 flags;
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/* Task for FAST handling */
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struct grouptask link_task;
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@ -514,6 +535,7 @@ struct adapter {
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unsigned long watchdog_events;
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struct e1000_hw_stats stats;
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u16 vf_ifp;
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};
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/********************************************************************************
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