Fixed some formatting bugs (mostly regressions in rev.1.48). Replaced
some magic numbers by pmap constants. Cosmetic.
This commit is contained in:
Bruce Evans
parent
7ce6b270fd
commit
f42cf36fa8
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@ -37,6 +37,7 @@
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#include <machine/asmacros.h>
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#include <machine/cputypes.h>
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#include <machine/pmap.h>
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#include <machine/specialreg.h>
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#include "assym.s"
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@ -674,18 +675,20 @@ ENTRY(generic_copyout)
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shrl $IDXSHIFT,%edx
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andb $0xfc,%dl
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1: /* check PTE for each page */
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1:
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/* check PTE for each page */
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leal _PTmap(%edx),%eax
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shrl $IDXSHIFT,%eax
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andb $0xfc,%al
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testb $0x01,_PTmap(%eax) /* PTE Page must be VALID */
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testb $PG_V,_PTmap(%eax) /* PTE page must be valid */
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je 4f
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movb _PTmap(%edx),%al
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andb $0x07,%al /* Pages must be VALID + USERACC + WRITABLE */
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cmpb $0x07,%al
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je 2f
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4: /* simulate a trap */
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movb _PTmap(%edx),%al
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andb $PG_V|PG_RW|PG_U,%al /* page must be valid and user writable */
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cmpb $PG_V|PG_RW|PG_U,%al
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je 2f
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4:
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/* simulate a trap */
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pushl %edx
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pushl %ecx
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shll $IDXSHIFT,%edx
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@ -1004,7 +1007,7 @@ fastmove_loop:
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addl %eax,%ecx
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cmpl $64,%ecx
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jae 4b
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/* curpcb->pcb_savefpu = tmp; */
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movl %ecx,-12(%ebp)
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movl %esi,-8(%ebp)
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@ -1026,7 +1029,7 @@ fastmove_loop:
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lmsw %ax
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/* npxproc = NULL; */
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movl $0,_npxproc
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ALIGN_TEXT
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fastmove_tail:
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movl _curpcb,%eax
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@ -1155,15 +1158,16 @@ ENTRY(suword)
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leal _PTmap(%edx),%ecx
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shrl $IDXSHIFT,%ecx
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andb $0xfc,%cl
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testb $0x01,_PTmap(%ecx) /* PTE Page must be VALID */
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testb $PG_V,_PTmap(%ecx) /* PTE page must be valid */
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je 4f
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movb _PTmap(%edx),%dl
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andb $0x7,%dl /* must be VALID + USERACC + WRITE */
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cmpb $0x7,%dl
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andb $PG_V|PG_RW|PG_U,%dl /* page must be valid and user writable */
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cmpb $PG_V|PG_RW|PG_U,%dl
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je 1f
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4:
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/* simulate a trap */
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4: pushl %eax
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pushl %eax
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call _trapwrite
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popl %edx /* remove junk parameter from stack */
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testl %eax,%eax
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@ -1172,7 +1176,7 @@ ENTRY(suword)
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movl 4(%esp),%edx
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#endif
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2:
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2:
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cmpl $VM_MAXUSER_ADDRESS-4,%edx /* verify address validity */
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ja fusufault
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@ -1203,14 +1207,15 @@ ENTRY(susword)
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leal _PTmap(%edx),%ecx
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shrl $IDXSHIFT,%ecx
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andb $0xfc,%cl
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testb $0x01,_PTmap(%ecx) /* PTE Page must be VALID */
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testb $PG_V,_PTmap(%ecx) /* PTE page must be valid */
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je 4f
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movb _PTmap(%edx),%dl
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andb $0x7,%dl /* must be VALID + USERACC + WRITE */
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cmpb $0x7,%dl
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andb $PG_V|PG_RW|PG_U,%dl /* page must be valid and user writable */
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cmpb $PG_V|PG_RW|PG_U,%dl
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je 1f
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4: /* simulate a trap */
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4:
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/* simulate a trap */
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pushl %eax
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call _trapwrite
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popl %edx /* remove junk parameter from stack */
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@ -1251,15 +1256,15 @@ ENTRY(subyte)
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leal _PTmap(%edx),%ecx
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shrl $IDXSHIFT,%ecx
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andb $0xfc,%cl
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testb $0x01,_PTmap(%ecx) /* PTE Page must be VALID */
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testb $PG_V,_PTmap(%ecx) /* PTE page must be valid */
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je 4f
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movb _PTmap(%edx),%dl
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andb $0x7,%dl /* must be VALID + USERACC + WRITE */
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cmpb $0x7,%dl
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andb $PG_V|PG_RW|PG_U,%dl /* page must be valid and user writable */
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cmpb $PG_V|PG_RW|PG_U,%dl
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je 1f
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4: /* simulate a trap */
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4:
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/* simulate a trap */
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pushl %eax
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call _trapwrite
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popl %edx /* remove junk parameter from stack */
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@ -37,6 +37,7 @@
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#include <machine/asmacros.h>
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#include <machine/cputypes.h>
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#include <machine/pmap.h>
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#include <machine/specialreg.h>
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#include "assym.s"
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@ -674,18 +675,20 @@ ENTRY(generic_copyout)
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shrl $IDXSHIFT,%edx
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andb $0xfc,%dl
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1: /* check PTE for each page */
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1:
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/* check PTE for each page */
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leal _PTmap(%edx),%eax
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shrl $IDXSHIFT,%eax
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andb $0xfc,%al
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testb $0x01,_PTmap(%eax) /* PTE Page must be VALID */
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testb $PG_V,_PTmap(%eax) /* PTE page must be valid */
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je 4f
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movb _PTmap(%edx),%al
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andb $0x07,%al /* Pages must be VALID + USERACC + WRITABLE */
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cmpb $0x07,%al
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je 2f
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4: /* simulate a trap */
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movb _PTmap(%edx),%al
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andb $PG_V|PG_RW|PG_U,%al /* page must be valid and user writable */
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cmpb $PG_V|PG_RW|PG_U,%al
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je 2f
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4:
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/* simulate a trap */
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pushl %edx
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pushl %ecx
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shll $IDXSHIFT,%edx
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@ -1004,7 +1007,7 @@ fastmove_loop:
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addl %eax,%ecx
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cmpl $64,%ecx
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jae 4b
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/* curpcb->pcb_savefpu = tmp; */
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movl %ecx,-12(%ebp)
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movl %esi,-8(%ebp)
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@ -1026,7 +1029,7 @@ fastmove_loop:
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lmsw %ax
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/* npxproc = NULL; */
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movl $0,_npxproc
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ALIGN_TEXT
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fastmove_tail:
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movl _curpcb,%eax
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@ -1155,15 +1158,16 @@ ENTRY(suword)
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leal _PTmap(%edx),%ecx
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shrl $IDXSHIFT,%ecx
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andb $0xfc,%cl
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testb $0x01,_PTmap(%ecx) /* PTE Page must be VALID */
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testb $PG_V,_PTmap(%ecx) /* PTE page must be valid */
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je 4f
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movb _PTmap(%edx),%dl
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andb $0x7,%dl /* must be VALID + USERACC + WRITE */
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cmpb $0x7,%dl
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andb $PG_V|PG_RW|PG_U,%dl /* page must be valid and user writable */
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cmpb $PG_V|PG_RW|PG_U,%dl
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je 1f
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4:
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/* simulate a trap */
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4: pushl %eax
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pushl %eax
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call _trapwrite
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popl %edx /* remove junk parameter from stack */
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testl %eax,%eax
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@ -1172,7 +1176,7 @@ ENTRY(suword)
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movl 4(%esp),%edx
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#endif
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2:
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2:
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cmpl $VM_MAXUSER_ADDRESS-4,%edx /* verify address validity */
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ja fusufault
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@ -1203,14 +1207,15 @@ ENTRY(susword)
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leal _PTmap(%edx),%ecx
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shrl $IDXSHIFT,%ecx
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andb $0xfc,%cl
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testb $0x01,_PTmap(%ecx) /* PTE Page must be VALID */
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testb $PG_V,_PTmap(%ecx) /* PTE page must be valid */
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je 4f
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movb _PTmap(%edx),%dl
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andb $0x7,%dl /* must be VALID + USERACC + WRITE */
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cmpb $0x7,%dl
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andb $PG_V|PG_RW|PG_U,%dl /* page must be valid and user writable */
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cmpb $PG_V|PG_RW|PG_U,%dl
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je 1f
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4: /* simulate a trap */
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4:
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/* simulate a trap */
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pushl %eax
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call _trapwrite
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popl %edx /* remove junk parameter from stack */
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@ -1251,15 +1256,15 @@ ENTRY(subyte)
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leal _PTmap(%edx),%ecx
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shrl $IDXSHIFT,%ecx
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andb $0xfc,%cl
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testb $0x01,_PTmap(%ecx) /* PTE Page must be VALID */
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testb $PG_V,_PTmap(%ecx) /* PTE page must be valid */
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je 4f
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movb _PTmap(%edx),%dl
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andb $0x7,%dl /* must be VALID + USERACC + WRITE */
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cmpb $0x7,%dl
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andb $PG_V|PG_RW|PG_U,%dl /* page must be valid and user writable */
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cmpb $PG_V|PG_RW|PG_U,%dl
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je 1f
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4: /* simulate a trap */
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4:
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/* simulate a trap */
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pushl %eax
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call _trapwrite
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popl %edx /* remove junk parameter from stack */
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@ -37,6 +37,7 @@
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#include <machine/asmacros.h>
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#include <machine/cputypes.h>
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#include <machine/pmap.h>
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#include <machine/specialreg.h>
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#include "assym.s"
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@ -674,18 +675,20 @@ ENTRY(generic_copyout)
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shrl $IDXSHIFT,%edx
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andb $0xfc,%dl
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1: /* check PTE for each page */
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1:
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/* check PTE for each page */
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leal _PTmap(%edx),%eax
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shrl $IDXSHIFT,%eax
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andb $0xfc,%al
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testb $0x01,_PTmap(%eax) /* PTE Page must be VALID */
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testb $PG_V,_PTmap(%eax) /* PTE page must be valid */
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je 4f
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movb _PTmap(%edx),%al
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andb $0x07,%al /* Pages must be VALID + USERACC + WRITABLE */
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cmpb $0x07,%al
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je 2f
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4: /* simulate a trap */
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movb _PTmap(%edx),%al
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andb $PG_V|PG_RW|PG_U,%al /* page must be valid and user writable */
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cmpb $PG_V|PG_RW|PG_U,%al
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je 2f
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4:
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/* simulate a trap */
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pushl %edx
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pushl %ecx
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shll $IDXSHIFT,%edx
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@ -1004,7 +1007,7 @@ fastmove_loop:
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addl %eax,%ecx
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cmpl $64,%ecx
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jae 4b
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/* curpcb->pcb_savefpu = tmp; */
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movl %ecx,-12(%ebp)
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movl %esi,-8(%ebp)
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@ -1026,7 +1029,7 @@ fastmove_loop:
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lmsw %ax
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/* npxproc = NULL; */
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movl $0,_npxproc
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ALIGN_TEXT
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fastmove_tail:
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movl _curpcb,%eax
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@ -1155,15 +1158,16 @@ ENTRY(suword)
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leal _PTmap(%edx),%ecx
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shrl $IDXSHIFT,%ecx
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andb $0xfc,%cl
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testb $0x01,_PTmap(%ecx) /* PTE Page must be VALID */
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testb $PG_V,_PTmap(%ecx) /* PTE page must be valid */
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je 4f
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movb _PTmap(%edx),%dl
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andb $0x7,%dl /* must be VALID + USERACC + WRITE */
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cmpb $0x7,%dl
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andb $PG_V|PG_RW|PG_U,%dl /* page must be valid and user writable */
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cmpb $PG_V|PG_RW|PG_U,%dl
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je 1f
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4:
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/* simulate a trap */
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4: pushl %eax
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pushl %eax
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call _trapwrite
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popl %edx /* remove junk parameter from stack */
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testl %eax,%eax
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@ -1172,7 +1176,7 @@ ENTRY(suword)
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movl 4(%esp),%edx
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#endif
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2:
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2:
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cmpl $VM_MAXUSER_ADDRESS-4,%edx /* verify address validity */
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ja fusufault
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@ -1203,14 +1207,15 @@ ENTRY(susword)
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leal _PTmap(%edx),%ecx
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shrl $IDXSHIFT,%ecx
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andb $0xfc,%cl
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testb $0x01,_PTmap(%ecx) /* PTE Page must be VALID */
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testb $PG_V,_PTmap(%ecx) /* PTE page must be valid */
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je 4f
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movb _PTmap(%edx),%dl
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andb $0x7,%dl /* must be VALID + USERACC + WRITE */
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cmpb $0x7,%dl
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andb $PG_V|PG_RW|PG_U,%dl /* page must be valid and user writable */
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cmpb $PG_V|PG_RW|PG_U,%dl
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je 1f
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4: /* simulate a trap */
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4:
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/* simulate a trap */
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pushl %eax
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call _trapwrite
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popl %edx /* remove junk parameter from stack */
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@ -1251,15 +1256,15 @@ ENTRY(subyte)
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leal _PTmap(%edx),%ecx
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shrl $IDXSHIFT,%ecx
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andb $0xfc,%cl
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testb $0x01,_PTmap(%ecx) /* PTE Page must be VALID */
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testb $PG_V,_PTmap(%ecx) /* PTE page must be valid */
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je 4f
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movb _PTmap(%edx),%dl
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andb $0x7,%dl /* must be VALID + USERACC + WRITE */
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cmpb $0x7,%dl
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andb $PG_V|PG_RW|PG_U,%dl /* page must be valid and user writable */
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cmpb $PG_V|PG_RW|PG_U,%dl
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je 1f
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4: /* simulate a trap */
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4:
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/* simulate a trap */
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pushl %eax
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call _trapwrite
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popl %edx /* remove junk parameter from stack */
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