dev/ath: minor spelling fixes in comments.
No functional change. Reviewed by: adrian
This commit is contained in:
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dd40d6d5e0
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f6b6084b8e
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@ -181,7 +181,7 @@ ath_dfs_process_phy_err(struct ath_softc *sc, struct mbuf *m,
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}
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/*
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* Process the radar events and determine whether a DFS event has occured.
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* Process the radar events and determine whether a DFS event has occurred.
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*
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* This is designed to run outside of the RX processing path.
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* The RX path will call ath_dfs_tasklet_needed() to see whether
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@ -362,7 +362,7 @@ ath_hal_computetxtime(struct ath_hal *ah,
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kbps = rates->info[rateix].rateKbps;
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/*
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* index can be invalid duting dynamic Turbo transitions.
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* index can be invalid during dynamic Turbo transitions.
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* XXX
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*/
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if (kbps == 0)
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@ -414,7 +414,7 @@ typedef enum {
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/* Allow all mcast/bcast frames */
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/*
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* Magic RX filter flags that aren't targetting hardware bits
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* Magic RX filter flags that aren't targeting hardware bits
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* but instead the HAL sets individual bits - eg PHYERR will result
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* in OFDM/CCK timing error frames being received.
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*/
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@ -1224,7 +1224,7 @@ typedef struct {
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/*
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* slotted mode only. rx_clear and bt_ant decision
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* will be held the entire time that BT_ACTIVE is asserted,
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* otherwise the decision is made before every slot boundry.
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* otherwise the decision is made before every slot boundary.
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*/
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HAL_BOOL bt_hold_rxclear;
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} HAL_BT_COEX_CONFIG;
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@ -490,7 +490,7 @@ getchannels(struct ath_hal *ah,
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break;
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default:
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HALDEBUG(ah, HAL_DEBUG_REGDOMAIN,
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"%s: Unkonwn HAL mode 0x%x\n", __func__, cm->mode);
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"%s: Unknown HAL mode 0x%x\n", __func__, cm->mode);
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continue;
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}
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if (isChanBitMaskZero(channelBM))
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@ -913,7 +913,7 @@ getNoiseFloorThresh(struct ath_hal *ah, const struct ieee80211_channel *chan,
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}
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/*
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* Read the NF and check it against the noise floor threshhold
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* Read the NF and check it against the noise floor threshold
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*
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* Returns: TRUE if the NF is good
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*/
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@ -373,9 +373,9 @@ ar2316getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
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* change pwr_I_0 to signed 5-bits.
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*/
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int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
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/* to accomodate -ve power levels later on. */
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/* to accommodate -ve power levels later on. */
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int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
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/* to accomodate -ve power levels later on */
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/* to accommodate -ve power levels later on */
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uint16_t numVpd = 0;
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uint16_t Vpd_step;
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int16_t tmpVal ;
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@ -351,9 +351,9 @@ ar2317getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
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* change pwr_I_0 to signed 5-bits.
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*/
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int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
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/* to accomodate -ve power levels later on. */
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/* to accommodate -ve power levels later on. */
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int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
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/* to accomodate -ve power levels later on */
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/* to accommodate -ve power levels later on */
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uint16_t numVpd = 0;
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uint16_t Vpd_step;
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int16_t tmpVal ;
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@ -367,9 +367,9 @@ ar2413getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
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* change pwr_I_0 to signed 5-bits.
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*/
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int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
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/* to accomodate -ve power levels later on. */
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/* to accommodate -ve power levels later on. */
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int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
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/* to accomodate -ve power levels later on */
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/* to accommodate -ve power levels later on */
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uint16_t numVpd = 0;
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uint16_t Vpd_step;
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int16_t tmpVal ;
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@ -372,9 +372,9 @@ ar2425getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
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* change pwr_I_0 to signed 5-bits.
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*/
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static int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
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/* to accomodate -ve power levels later on. */
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/* to accommodate -ve power levels later on. */
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static int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
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/* to accomodate -ve power levels later on */
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/* to accommodate -ve power levels later on */
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uint16_t numVpd = 0;
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uint16_t Vpd_step;
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int16_t tmpVal ;
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@ -885,7 +885,7 @@ ar5212FillCapabilityInfo(struct ath_hal *ah)
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pCap->halRfSilentSupport = AH_TRUE;
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}
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/* NB: this is a guess, noone seems to know the answer */
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/* NB: this is a guess, no one seems to know the answer */
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ahpriv->ah_rxornIsFatal =
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(AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_VENICE);
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@ -51,7 +51,7 @@ ar5212SetPowerModeAwake(struct ath_hal *ah, int setChip)
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* which when blindly written back with OS_REG_RMW_FIELD
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* enables the MIB interrupt for the sleep performance
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* counters. This can result in an interrupt storm when
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* ANI is in operation as noone knows to turn off the MIB
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* ANI is in operation as no one knows to turn off the MIB
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* interrupt cause.
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*/
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scr = OS_REG_READ(ah, AR_SCR);
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@ -1385,7 +1385,7 @@ ar5212GetNfHistMid(const int16_t calData[AR512_NF_CAL_HIST_MAX])
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}
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/*
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* Read the NF and check it against the noise floor threshhold
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* Read the NF and check it against the noise floor threshold
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*/
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int16_t
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ar5212GetNf(struct ath_hal *ah, struct ieee80211_channel *chan)
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@ -411,9 +411,9 @@ ar5413getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
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* change pwr_I_0 to signed 5-bits.
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*/
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int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
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/* to accomodate -ve power levels later on. */
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/* to accommodate -ve power levels later on. */
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int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
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/* to accomodate -ve power levels later on */
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/* to accommodate -ve power levels later on */
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uint16_t numVpd = 0;
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uint16_t Vpd_step;
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int16_t tmpVal ;
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@ -95,7 +95,7 @@ ar5416BTCoexSetWeights(struct ath_hal *ah, u_int32_t stompType)
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struct ath_hal_5416 *ahp = AH5416(ah);
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if (AR_SREV_KIWI_10_OR_LATER(ah)) {
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/* TODO: TX RX seperate is not enabled. */
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/* TODO: TX RX separate is not enabled. */
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switch (stompType) {
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case HAL_BT_COEX_STOMP_ALL:
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ahp->ah_btCoexBTWeight = AR5416_BT_WGHT;
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@ -772,7 +772,7 @@ ar5416SanitizeNF(struct ath_hal *ah, int16_t *nf)
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/*
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* Read the NF and check it against the noise floor threshhold
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* Read the NF and check it against the noise floor threshold
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*
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* Return 0 if the NF calibration hadn't finished, 0 if it was
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* invalid, or > 0 for a valid NF reading.
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@ -119,7 +119,7 @@ ar5416ConfigureSpectralScan(struct ath_hal *ah, HAL_SPECTRAL_PARAM *ss)
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} else {
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if (ss->ss_count != HAL_SPECTRAL_PARAM_NOVAL) {
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/*
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* In Merlin, for continous scan, scan_count = 128.
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* In Merlin, for continuous scan, scan_count = 128.
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* In case of Kiwi, this value should be 0
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*/
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if (ss->ss_count == 128)
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@ -807,7 +807,7 @@ ar5416ProcTxDesc(struct ath_hal *ah,
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}
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/*
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* These fields are not used. Zero these to preserve compatability
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* These fields are not used. Zero these to preserve compatibility
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* with existing drivers.
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*/
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ts->ts_virtcol = MS(ads->ds_ctl1, AR_VirtRetryCnt);
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@ -277,10 +277,10 @@
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#define AR_PCIE_PM_CTRL_ENA 0x00080000
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#define AR_AHB_EXACT_WR_EN 0x00000000 /* write exact bytes */
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#define AR_AHB_BUF_WR_EN 0x00000001 /* buffer write upto cacheline*/
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#define AR_AHB_BUF_WR_EN 0x00000001 /* buffer write up to cacheline*/
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#define AR_AHB_EXACT_RD_EN 0x00000000 /* read exact bytes */
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#define AR_AHB_CACHELINE_RD_EN 0x00000002 /* read upto end of cacheline */
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#define AR_AHB_PREFETCH_RD_EN 0x00000004 /* prefetch upto page boundary*/
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#define AR_AHB_CACHELINE_RD_EN 0x00000002 /* read up to end of cacheline */
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#define AR_AHB_PREFETCH_RD_EN 0x00000004 /* prefetch up to page boundary*/
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#define AR_AHB_PAGE_SIZE_1K 0x00000000 /* set page-size as 1k */
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#define AR_AHB_PAGE_SIZE_2K 0x00000008 /* set page-size as 2k */
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#define AR_AHB_PAGE_SIZE_4K 0x00000010 /* set page-size as 4k */
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@ -518,7 +518,7 @@
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#define AR_PCU_FORCE_QUIET_COLL 0x00040000 /* kill xmit for channel change */
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#define AR_PCU_BT_ANT_PREVENT_RX 0x00100000
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#define AR_PCU_BT_ANT_PREVENT_RX_S 20
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#define AR_PCU_TBTT_PROTECT 0x00200000 /* no xmit upto tbtt+20 uS */
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#define AR_PCU_TBTT_PROTECT 0x00200000 /* no xmit up to tbtt+20 uS */
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#define AR_PCU_CLEAR_VMF 0x01000000 /* clear vmf mode (fast cc)*/
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#define AR_PCU_CLEAR_BA_VALID 0x04000000 /* clear ba state */
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#define AR_PCU_SEL_EVM 0x08000000 /* select EVM data or PLCP header */
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@ -328,7 +328,7 @@ ar9280SetPowerCalTable(struct ath_hal *ah, struct ar5416eeprom *pEepData,
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* uses this to calculate the PDADC delta during
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* calibration ; 0 here effectively stops the
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* temperature compensation calibration from
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* occuring.
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* occurring.
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*/
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AH5416(ah)->initPDADC = 0;
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}
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@ -2698,7 +2698,7 @@ ath_txrx_start(struct ath_softc *sc)
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}
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/*
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* Grab the reset lock, and wait around until noone else
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* Grab the reset lock, and wait around until no one else
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* is trying to do anything with it.
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*
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* This is totally horrible but we can't hold this lock for
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@ -2782,7 +2782,7 @@ ath_reset(struct ath_softc *sc, ATH_RESET_TYPE reset_type)
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ATH_PCU_UNLOCK_ASSERT(sc);
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ATH_UNLOCK_ASSERT(sc);
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/* Try to (stop any further TX/RX from occuring */
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/* Try to (stop any further TX/RX from occurring */
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taskqueue_block(sc->sc_tq);
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/*
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@ -2826,7 +2826,7 @@ ath_reset(struct ath_softc *sc, ATH_RESET_TYPE reset_type)
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/*
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* Should now wait for pending TX/RX to complete
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* and block future ones from occuring. This needs to be
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* and block future ones from occurring. This needs to be
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* done before the TX queue is drained.
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*/
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ath_draintxq(sc, reset_type); /* stop xmit side */
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@ -3676,7 +3676,7 @@ ath_bstuck_proc(void *arg, int pending)
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sc->sc_stats.ast_bstuck++;
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/*
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* This assumes that there's no simultaneous channel mode change
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* occuring.
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* occurring.
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*/
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ath_reset(sc, ATH_RESET_NOLOSS);
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}
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@ -4737,7 +4737,7 @@ ath_tx_freebuf(struct ath_softc *sc, struct ath_buf *bf, int status)
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/*
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* Make sure that we only sync/unload if there's an mbuf.
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* If not (eg we cloned a buffer), the unload will have already
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* occured.
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* occurred.
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*/
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if (bf->bf_m != NULL) {
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bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
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@ -5076,7 +5076,7 @@ ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan)
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ATH_PCU_UNLOCK_ASSERT(sc);
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ATH_UNLOCK_ASSERT(sc);
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/* (Try to) stop TX/RX from occuring */
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/* (Try to) stop TX/RX from occurring */
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taskqueue_block(sc->sc_tq);
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ATH_PCU_LOCK(sc);
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@ -5857,7 +5857,7 @@ ath_newassoc(struct ieee80211_node *ni, int isnew)
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* If we're reassociating, make sure that any paused queues
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* get unpaused.
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*
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* Now, we may hvae frames in the hardware queue for this node.
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* Now, we may have frames in the hardware queue for this node.
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* So if we are reassociating and there are frames in the queue,
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* we need to go through the cleanup path to ensure that they're
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* marked as non-aggregate.
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@ -6068,7 +6068,7 @@ ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode)
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sc->sc_currates = rt;
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sc->sc_curmode = mode;
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/*
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* All protection frames are transmited at 2Mb/s for
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* All protection frames are transmitted at 2Mb/s for
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* 11g, otherwise at 1Mb/s.
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*/
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if (mode == IEEE80211_MODE_11G)
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@ -163,7 +163,7 @@ bad:
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* Diagnostic interface to the HAL. This is used by various
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* tools to do things like retrieve register contents for
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* debugging. The mechanism is intentionally opaque so that
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* it can change frequently w/o concern for compatiblity.
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* it can change frequently w/o concern for compatibility.
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*/
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static int
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ath_ioctl_diag(struct ath_softc *sc, struct ath_diag *ad)
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@ -73,7 +73,7 @@ __FBSDID("$FreeBSD$");
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#include <dev/ath/if_ath_debug.h>
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#include <dev/ath/if_ath_lna_div.h>
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/* Linux compability macros */
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/* Linux compatibility macros */
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/*
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* XXX these don't handle rounding, underflow, overflow, wrapping!
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*/
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@ -82,7 +82,7 @@ struct ath_pci_softc {
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/*
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* XXX eventually this should be some system level definition
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* so modules will hvae probe/attach information like USB.
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* so modules will have probe/attach information like USB.
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* But for now..
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*/
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struct pci_device_id {
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@ -802,7 +802,7 @@ rx_accept:
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* This code should be removed once the actual
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* root cause of the issue has been identified.
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* For example, it may be that the rs_antenna
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* field is only valid for the lsat frame of
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* field is only valid for the last frame of
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* an aggregate and it just happens that it is
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* "mostly" right. (This is a general statement -
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* the majority of the statistics are only valid
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@ -3125,7 +3125,7 @@ ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni,
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* If we're not doing A-MPDU, be prepared to direct dispatch
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* up to both limits if possible. This particular corner
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* case may end up with packet starvation between aggregate
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* traffic and non-aggregate traffic: we wnat to ensure
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* traffic and non-aggregate traffic: we want to ensure
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* that non-aggregate stations get a few frames queued to the
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* hardware before the aggregate station(s) get their chance.
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*
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@ -3949,7 +3949,7 @@ ath_tx_tid_reset(struct ath_softc *sc, struct ath_tid *tid)
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* XXX TODO: it may just be enough to walk the HWQs and mark
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* frames for that node as non-aggregate; or mark the ath_node
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* with something that indicates that aggregation is no longer
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* occuring. Then we can just toss the BAW complaints and
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* occurring. Then we can just toss the BAW complaints and
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* do a complete hard reset of state here - no pause, no
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* complete counter, etc.
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*/
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@ -126,7 +126,7 @@ struct ath_tid {
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TAILQ_HEAD(,ath_buf) tid_q; /* pending buffers */
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struct ath_node *an; /* pointer to parent */
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int tid; /* tid */
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int ac; /* which AC gets this trafic */
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int ac; /* which AC gets this traffic */
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int hwq_depth; /* how many buffers are on HW */
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u_int axq_depth; /* SW queue depth */
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