Begin abstracting out the RX path in preparation for RX EDMA support.
The RX EDMA support requires a modified approach to the RX descriptor
handling.
Specifically:
* There's now two RX queues - high and low priority;
* The RX queues are implemented as FIFOs; they're now an array of pointers
to buffers;
* .. and the RX buffer and descriptor are in the same "buffer", rather than
being separate.
So to that end, this commit abstracts out most of the RX related functions
from the bulk of the driver. Notably, the RX DMA/buffer allocation isn't
updated, primarily because I haven't yet fleshed out what it should look
like.
Whilst I'm here, create a set of matching but mostly unimplemented EDMA
stubs.
Tested:
* AR9280, station mode
TODO:
* Thorough AP and other mode testing for non-EDMA chips;
* Figure out how to allocate RX buffers suitable for RX EDMA, including
correctly setting the mbuf length to compensate for the RX descriptor
and completion status area.
This commit is contained in:
Adrian Chadd
parent
9a0b948f98
commit
f8cc9b09b0
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@ -108,6 +108,7 @@ __FBSDID("$FreeBSD$");
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#include <dev/ath/if_ath_led.h>
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#include <dev/ath/if_ath_keycache.h>
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#include <dev/ath/if_ath_rx.h>
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#include <dev/ath/if_ath_rx_edma.h>
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#include <dev/ath/if_ath_beacon.h>
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#include <dev/ath/if_athdfs.h>
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@ -301,6 +302,17 @@ ath_attach(u_int16_t devid, struct ath_softc *sc)
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sc->sc_debug = ath_debug;
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#endif
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/*
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* Setup the DMA/EDMA functions based on the current
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* hardware support.
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*
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* This is required before the descriptors are allocated.
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*/
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if (ath_hal_hasedma(sc->sc_ah))
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ath_recv_setup_edma(sc);
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else
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ath_recv_setup_legacy(sc);
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/*
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* Check if the MAC has multi-rate retry support.
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* We do this by trying to setup a fake extended
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@ -376,7 +388,7 @@ ath_attach(u_int16_t devid, struct ath_softc *sc)
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taskqueue_start_threads(&sc->sc_tq, 1, PI_NET,
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"%s taskq", ifp->if_xname);
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TASK_INIT(&sc->sc_rxtask, 0, ath_rx_tasklet, sc);
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TASK_INIT(&sc->sc_rxtask, 0, sc->sc_rx.recv_tasklet, sc);
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TASK_INIT(&sc->sc_bmisstask, 0, ath_bmiss_proc, sc);
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TASK_INIT(&sc->sc_bstucktask,0, ath_bstuck_proc, sc);
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TASK_INIT(&sc->sc_resettask,0, ath_reset_proc, sc);
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@ -2100,7 +2112,7 @@ ath_reset(struct ifnet *ifp, ATH_RESET_TYPE reset_type)
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* That way frames aren't dropped which shouldn't be.
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*/
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ath_stoprecv(sc, (reset_type != ATH_RESET_NOLOSS));
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ath_rx_proc(sc, 0);
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ath_rx_flush(sc);
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ath_settkipmic(sc); /* configure TKIP MIC handling */
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/* NB: indicate channel change so we do a full reset */
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@ -4018,7 +4030,7 @@ ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan)
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/*
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* First, handle completed TX/RX frames.
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*/
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ath_rx_proc(sc, 0);
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ath_rx_flush(sc);
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ath_draintxq(sc, ATH_RESET_NOLOSS);
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/*
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* Next, flush the non-scheduled frames.
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@ -214,8 +214,8 @@ ath_calcrxfilter(struct ath_softc *sc)
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return rfilt;
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}
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int
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ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf)
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static int
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ath_legacy_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf)
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{
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struct ath_hal *ah = sc->sc_ah;
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int error;
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@ -463,29 +463,6 @@ ath_handle_micerror(struct ieee80211com *ic,
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}
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}
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/*
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* Only run the RX proc if it's not already running.
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* Since this may get run as part of the reset/flush path,
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* the task can't clash with an existing, running tasklet.
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*/
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void
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ath_rx_tasklet(void *arg, int npending)
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{
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struct ath_softc *sc = arg;
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CTR1(ATH_KTR_INTR, "ath_rx_proc: pending=%d", npending);
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DPRINTF(sc, ATH_DEBUG_RX_PROC, "%s: pending %u\n", __func__, npending);
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ATH_PCU_LOCK(sc);
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if (sc->sc_inreset_cnt > 0) {
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device_printf(sc->sc_dev,
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"%s: sc_inreset_cnt > 0; skipping\n", __func__);
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ATH_PCU_UNLOCK(sc);
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return;
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}
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ATH_PCU_UNLOCK(sc);
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ath_rx_proc(sc, 1);
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}
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static int
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ath_rx_pkt(struct ath_softc *sc, struct ath_rx_status *rs, HAL_STATUS status,
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uint64_t tsf, int nf, struct ath_buf *bf)
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@ -814,7 +791,7 @@ rx_next:
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return (is_good);
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}
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void
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static void
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ath_rx_proc(struct ath_softc *sc, int resched)
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{
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#define PA2DESC(_sc, _pa) \
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@ -964,11 +941,42 @@ rx_proc_next:
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ATH_PCU_UNLOCK(sc);
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}
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/*
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* Only run the RX proc if it's not already running.
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* Since this may get run as part of the reset/flush path,
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* the task can't clash with an existing, running tasklet.
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*/
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static void
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ath_legacy_rx_tasklet(void *arg, int npending)
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{
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struct ath_softc *sc = arg;
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CTR1(ATH_KTR_INTR, "ath_rx_proc: pending=%d", npending);
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DPRINTF(sc, ATH_DEBUG_RX_PROC, "%s: pending %u\n", __func__, npending);
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ATH_PCU_LOCK(sc);
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if (sc->sc_inreset_cnt > 0) {
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device_printf(sc->sc_dev,
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"%s: sc_inreset_cnt > 0; skipping\n", __func__);
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ATH_PCU_UNLOCK(sc);
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return;
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}
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ATH_PCU_UNLOCK(sc);
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ath_rx_proc(sc, 1);
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}
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static void
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ath_legacy_flushrecv(struct ath_softc *sc)
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{
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ath_rx_proc(sc, 0);
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}
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/*
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* Disable the receive h/w in preparation for a reset.
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*/
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void
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ath_stoprecv(struct ath_softc *sc, int dodelay)
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static void
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ath_legacy_stoprecv(struct ath_softc *sc, int dodelay)
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{
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#define PA2DESC(_sc, _pa) \
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((struct ath_desc *)((caddr_t)(_sc)->sc_rxdma.dd_desc + \
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@ -1019,8 +1027,8 @@ ath_stoprecv(struct ath_softc *sc, int dodelay)
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/*
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* Enable the receive h/w following a reset.
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*/
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int
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ath_startrecv(struct ath_softc *sc)
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static int
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ath_legacy_startrecv(struct ath_softc *sc)
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{
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struct ath_hal *ah = sc->sc_ah;
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struct ath_buf *bf;
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@ -1044,3 +1052,17 @@ ath_startrecv(struct ath_softc *sc)
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ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */
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return 0;
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}
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void
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ath_recv_setup_legacy(struct ath_softc *sc)
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{
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device_printf(sc->sc_dev, "DMA setup: legacy\n");
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sc->sc_rx.recv_start = ath_legacy_startrecv;
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sc->sc_rx.recv_stop = ath_legacy_stoprecv;
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sc->sc_rx.recv_flush = ath_legacy_flushrecv;
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sc->sc_rx.recv_tasklet = ath_legacy_rx_tasklet;
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sc->sc_rx.recv_rxbuf_init = ath_legacy_rxbuf_init;
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}
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@ -32,12 +32,26 @@
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#define __IF_ATH_RX_H__
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extern u_int32_t ath_calcrxfilter(struct ath_softc *sc);
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extern int ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf);
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extern void ath_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m,
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int subtype, int rssi, int nf);
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#define ath_stoprecv(_sc, _dodelay) \
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(_sc)->sc_rx.recv_stop((_sc), (_dodelay))
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#define ath_startrecv(_sc) \
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(_sc)->sc_rx.recv_start((_sc))
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#define ath_rx_flush(_sc) \
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(_sc)->sc_rx.recv_flush((_sc))
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#define ath_rxbuf_init(_sc, _bf) \
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(_sc)->sc_rx.recv_rxbuf_init((_sc), (_bf))
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#if 0
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extern int ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf);
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extern void ath_rx_tasklet(void *arg, int npending);
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extern void ath_rx_proc(struct ath_softc *sc, int resched);
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extern void ath_stoprecv(struct ath_softc *sc, int dodelay);
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extern int ath_startrecv(struct ath_softc *sc);
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#endif
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extern void ath_recv_setup_legacy(struct ath_softc *sc);
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#endif
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@ -0,0 +1,192 @@
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/*-
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* Copyright (c) 2012 Adrian Chadd <adrian@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Driver for the Atheros Wireless LAN controller.
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*
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* This software is derived from work of Atsushi Onoe; his contribution
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* is greatly appreciated.
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*/
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#include "opt_inet.h"
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#include "opt_ath.h"
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/*
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* This is needed for register operations which are performed
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* by the driver - eg, calls to ath_hal_gettsf32().
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*
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* It's also required for any AH_DEBUG checks in here, eg the
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* module dependencies.
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*/
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#include "opt_ah.h"
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#include "opt_wlan.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/sysctl.h>
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#include <sys/mbuf.h>
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#include <sys/malloc.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/sockio.h>
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#include <sys/errno.h>
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#include <sys/callout.h>
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#include <sys/bus.h>
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#include <sys/endian.h>
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#include <sys/kthread.h>
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#include <sys/taskqueue.h>
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#include <sys/priv.h>
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#include <sys/module.h>
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#include <sys/ktr.h>
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#include <sys/smp.h> /* for mp_ncpus */
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#include <machine/bus.h>
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#include <net/if.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/if_types.h>
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#include <net/if_arp.h>
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#include <net/ethernet.h>
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#include <net/if_llc.h>
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#include <net80211/ieee80211_var.h>
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#include <net80211/ieee80211_regdomain.h>
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#ifdef IEEE80211_SUPPORT_SUPERG
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#include <net80211/ieee80211_superg.h>
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#endif
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#ifdef IEEE80211_SUPPORT_TDMA
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#include <net80211/ieee80211_tdma.h>
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#endif
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#include <net/bpf.h>
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#ifdef INET
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#include <netinet/in.h>
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#include <netinet/if_ether.h>
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#endif
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#include <dev/ath/if_athvar.h>
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#include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */
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#include <dev/ath/ath_hal/ah_diagcodes.h>
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#include <dev/ath/if_ath_debug.h>
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#include <dev/ath/if_ath_misc.h>
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#include <dev/ath/if_ath_tsf.h>
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#include <dev/ath/if_ath_tx.h>
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#include <dev/ath/if_ath_sysctl.h>
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#include <dev/ath/if_ath_led.h>
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#include <dev/ath/if_ath_keycache.h>
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#include <dev/ath/if_ath_rx.h>
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#include <dev/ath/if_ath_beacon.h>
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#include <dev/ath/if_athdfs.h>
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#ifdef ATH_TX99_DIAG
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#include <dev/ath/ath_tx99/ath_tx99.h>
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#endif
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#include <dev/ath/if_ath_rx_edma.h>
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static void
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ath_edma_stoprecv(struct ath_softc *sc, int dodelay)
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{
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struct ath_hal *ah = sc->sc_ah;
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ath_hal_stoppcurecv(ah);
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ath_hal_setrxfilter(ah, 0);
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ath_hal_stopdmarecv(ah);
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DELAY(3000);
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if (sc->sc_rxpending != NULL) {
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m_freem(sc->sc_rxpending);
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sc->sc_rxpending = NULL;
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}
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sc->sc_rxlink = NULL;
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}
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static int
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ath_edma_startrecv(struct ath_softc *sc)
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{
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struct ath_hal *ah = sc->sc_ah;
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sc->sc_rxlink = NULL;
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sc->sc_rxpending = NULL;
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/* XXX setup HP RX queue FIFO pointer */
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/* XXX setup LP RX queue FIFO pointer */
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/* XXX ath_hal_rxena() */
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ath_mode_init(sc);
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ath_hal_startpcurecv(ah);
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return (0);
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}
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static void
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ath_edma_recv_flush(struct ath_softc *sc)
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{
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device_printf(sc->sc_dev, "%s: called\n", __func__);
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}
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static void
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ath_edma_recv_tasklet(void *arg, int npending)
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{
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struct ath_softc *sc = (struct ath_softc *) arg;
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device_printf(sc->sc_dev, "%s: called; npending=%d\n",
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__func__,
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npending);
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/* XXX TODO */
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}
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static int
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ath_edma_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf)
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{
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device_printf(sc->sc_dev, "%s: called; bf=%p\n", __func__, bf);
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return (EIO);
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}
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void
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ath_recv_setup_edma(struct ath_softc *sc)
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{
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|
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device_printf(sc->sc_dev, "DMA setup: EDMA\n");
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sc->sc_rx.recv_stop = ath_edma_stoprecv;
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sc->sc_rx.recv_start = ath_edma_startrecv;
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sc->sc_rx.recv_flush = ath_edma_recv_flush;
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sc->sc_rx.recv_tasklet = ath_edma_recv_tasklet;
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sc->sc_rx.recv_rxbuf_init = ath_edma_rxbuf_init;
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||||
}
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||||
|
|
@ -0,0 +1,36 @@
|
|||
/*-
|
||||
* Copyright (c) 2012 Adrian Chadd <adrian@FreeBSD.org>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer,
|
||||
* without modification.
|
||||
* 2. Redistributions in binary form must reproduce at minimum a disclaimer
|
||||
* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
|
||||
* redistribution must be conditioned upon including a substantially
|
||||
* similar Disclaimer requirement for further binary redistribution.
|
||||
*
|
||||
* NO WARRANTY
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
|
||||
* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
|
||||
* THE POSSIBILITY OF SUCH DAMAGES.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
#ifndef __IF_ATH_RX_EDMA_H__
|
||||
#define __IF_ATH_RX_EDMA_H__
|
||||
|
||||
extern void ath_recv_setup_edma(struct ath_softc *sc);
|
||||
|
||||
#endif
|
||||
|
|
@ -372,6 +372,15 @@ typedef enum {
|
|||
ATH_RESET_FULL = 2,
|
||||
} ATH_RESET_TYPE;
|
||||
|
||||
struct ath_rx_methods {
|
||||
void (*recv_stop)(struct ath_softc *sc, int dodelay);
|
||||
int (*recv_start)(struct ath_softc *sc);
|
||||
void (*recv_flush)(struct ath_softc *sc);
|
||||
void (*recv_tasklet)(void *arg, int npending);
|
||||
int (*recv_rxbuf_init)(struct ath_softc *sc,
|
||||
struct ath_buf *bf);
|
||||
};
|
||||
|
||||
struct ath_softc {
|
||||
struct ifnet *sc_ifp; /* interface common */
|
||||
struct ath_stats sc_stats; /* interface statistics */
|
||||
|
|
@ -385,6 +394,8 @@ struct ath_softc {
|
|||
u_int8_t sc_nbssid0; /* # vap's using base mac */
|
||||
uint32_t sc_bssidmask; /* bssid mask */
|
||||
|
||||
struct ath_rx_methods sc_rx;
|
||||
|
||||
void (*sc_node_cleanup)(struct ieee80211_node *);
|
||||
void (*sc_node_free)(struct ieee80211_node *);
|
||||
device_t sc_dev;
|
||||
|
|
|
|||
Loading…
Reference in New Issue