125 lines
4.0 KiB
C
125 lines
4.0 KiB
C
/* $Id$ */
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/* From: NetBSD: intr.h,v 1.11 1997/11/10 18:23:50 mjacob Exp */
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/*
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* Copyright (c) 1997 Christopher G. Demetriou. All rights reserved.
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* Copyright (c) 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#ifndef _ALPHA_INTR_H_
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#define _ALPHA_INTR_H_
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#include <sys/queue.h>
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#define IPL_NONE 0 /* disable only this interrupt */
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#define IPL_BIO 1 /* disable block I/O interrupts */
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#define IPL_NET 2 /* disable network interrupts */
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#define IPL_TTY 3 /* disable terminal interrupts */
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#define IPL_CLOCK 4 /* disable clock interrupts */
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#define IPL_HIGH 5 /* disable all interrupts */
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#define IST_UNUSABLE -1 /* interrupt cannot be used */
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#define IST_NONE 0 /* none (dummy) */
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#define IST_PULSE 1 /* pulsed */
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#define IST_EDGE 2 /* edge-triggered */
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#define IST_LEVEL 3 /* level-triggered */
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#ifdef _KERNEL
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/* IPL-lowering/restoring macros */
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#define splx(s) \
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((s) == ALPHA_PSL_IPL_0 ? spl0() : alpha_pal_swpipl(s))
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#define splsoft() alpha_pal_swpipl(ALPHA_PSL_IPL_SOFT)
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#define splsoftclock() splsoft()
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#define splsoftnet() splsoft()
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/* IPL-raising functions/macros */
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static __inline int _splraise __P((int)) __attribute__ ((unused));
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static __inline int
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_splraise(s)
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int s;
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{
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int cur = alpha_pal_rdps() & ALPHA_PSL_IPL_MASK;
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return (s > cur ? alpha_pal_swpipl(s) : cur);
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}
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#define splnet() _splraise(ALPHA_PSL_IPL_IO)
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#define splbio() _splraise(ALPHA_PSL_IPL_IO)
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#define splimp() _splraise(ALPHA_PSL_IPL_IO)
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#define spltty() _splraise(ALPHA_PSL_IPL_IO)
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#define splclock() _splraise(ALPHA_PSL_IPL_CLOCK)
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#define splstatclock() _splraise(ALPHA_PSL_IPL_CLOCK)
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#define splhigh() _splraise(ALPHA_PSL_IPL_HIGH)
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/*
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* simulated software interrupt register
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*/
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extern u_int64_t ssir;
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#define SIR_NET 0x1
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#define SIR_CLOCK 0x2
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#define setsoftnet() ssir |= SIR_NET
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#define setsoftclock() ssir |= SIR_CLOCK
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/*
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* Alpha shared-interrupt-line common code.
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*/
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struct alpha_shared_intrhand {
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TAILQ_ENTRY(alpha_shared_intrhand)
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ih_q;
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int (*ih_fn) __P((void *));
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void *ih_arg;
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int ih_level;
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};
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struct alpha_shared_intr {
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TAILQ_HEAD(,alpha_shared_intrhand)
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intr_q;
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int intr_sharetype;
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int intr_dfltsharetype;
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int intr_nstrays;
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int intr_maxstrays;
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};
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struct alpha_shared_intr *alpha_shared_intr_alloc __P((unsigned int));
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int alpha_shared_intr_dispatch __P((struct alpha_shared_intr *,
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unsigned int));
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void *alpha_shared_intr_establish __P((struct alpha_shared_intr *,
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unsigned int, int, int, int (*)(void *), void *, const char *));
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int alpha_shared_intr_get_sharetype __P((struct alpha_shared_intr *,
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unsigned int));
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int alpha_shared_intr_isactive __P((struct alpha_shared_intr *,
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unsigned int));
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void alpha_shared_intr_set_dfltsharetype __P((struct alpha_shared_intr *,
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unsigned int, int));
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void alpha_shared_intr_set_maxstrays __P((struct alpha_shared_intr *,
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unsigned int, int));
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void alpha_shared_intr_stray __P((struct alpha_shared_intr *, unsigned int,
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const char *));
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#endif
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#endif
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