Ying-Chieh Liao
9a27501579
add ziarc 20020729
...
ZiaRC is a Resistor Calculator
2003-02-09 17:11:07 +00:00
Ying-Chieh Liao
74f0872c5b
add chipvault 200211
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A project organizer for VHDL and Verilog RTL hardware designs
2003-01-29 03:45:13 +00:00
Edwin Groothuis
9599d77f5b
new port: cad/gwave
...
Gwave is a waveform viewer. Its purpose is for viewing
analog data, such as the output from Spice-like simulations.
PR: ports/39364
Submitted by: Duncan Barclay <dmlb@dmlb.org>
2003-01-19 00:35:38 +00:00
Mario Sergio Fujikawa Ferreira
7e447426ca
New port atlc version 4.0.1: A tool to calculate the impedance of
...
transmission lines
Submitted by: blackend
2002-11-13 20:21:29 +00:00
Mario Sergio Fujikawa Ferreira
7618128fa0
New port cascade version 1.4: A simple tool to analyze noise and
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distortion of a RF system
Submitted by: blackend
2002-11-13 19:12:13 +00:00
Ying-Chieh Liao
cc10a40657
add geda-utils
...
gEDA utilities
PR: 43563
Submitted by: bruno <bruno@mail.tinkerbox.org>
2002-10-10 18:38:37 +00:00
Ying-Chieh Liao
18101fc040
add geda-symcheck
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gEDA symbol checking utility
PR: 43563
Submitted by: bruno <bruno@mail.tinkerbox.org>
2002-10-10 18:35:25 +00:00
Ying-Chieh Liao
de3b760914
add transcalc 0.13
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A analysis and synthesis tool for RF and microwave transmission lines
2002-09-06 09:40:18 +00:00
Ying-Chieh Liao
b71019d0c9
add gerbv 0.0.9
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A Free Gerber Viewer
2002-07-15 20:00:33 +00:00
Thomas Gellekum
20750047b8
Remove acs. Its successor, gnucap, is already in the tree.
2002-06-27 12:01:29 +00:00
Ying-Chieh Liao
0f996dab84
add gtkwave 2.0.0p1
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Electronic Waveform Viewer
2002-05-12 15:14:08 +00:00
Ying-Chieh Liao
db6897617d
add qfsm 0.30
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A graphical tool for designing finite state machines
2002-04-11 18:27:36 +00:00
Pete Fritchman
0eedcf658b
Add leocad 0.73, a CAD program that uses bricks similar to those
...
found in many toys.
PR: 35231
Submitted by: David Yeske <dyeske@yahoo.com>
2002-03-03 00:40:21 +00:00
Kevin Lo
9c47fcc98e
Initial import of ngspice_rework
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Ngspice_rework is a circuit simulator derived from spice3f5.
PR: 34589
Submitted by: AMAKAWA Shuhei <amakawa@jp.FreeBSD.org>
2002-02-09 10:03:42 +00:00
Ying-Chieh Liao
790c8aa5ce
add slffea 1.25
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San Le's Free Finite Element Analysis
2002-02-09 07:30:11 +00:00
Ying-Chieh Liao
845950814a
add gnucap 0.30
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The Gnu Circuit Analysis Package
2002-02-07 07:07:48 +00:00
Maxim Sobolev
9327635599
Add linux-eagle , an easy to use, yet powerful tool for designing
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printed circuit boards.
2001-12-26 16:12:17 +00:00
Ying-Chieh Liao
0d8c0cb73a
add qmls
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Quine-McCluskey Logic Simplifier
2001-12-10 05:18:39 +00:00
Ying-Chieh Liao
820c87e724
add pdnmesh
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A finite element program
PR: 30115
Submitted by: Sarod Yatawatta <sarod@cs.pdn.ac.lk>
2001-10-14 17:54:31 +00:00
Vanilla I. Shu
9f233704f3
gEDA electronic schematic capture tools
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Submitted by: bruno.schwander@technologist.com
2001-04-07 00:20:37 +00:00
Vanilla I. Shu
1c640af553
gEDA electronic schematic capture tools
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Submitted by: bruno.schwander@technologist.com
2001-04-07 00:19:08 +00:00
Vanilla I. Shu
ad3b4801e5
geda-symbols is the basic component of geda package.
...
Submitted byu.schwander@technologist.com
2001-04-07 00:17:32 +00:00
Vanilla I. Shu
1071e87cec
libgeda is a a base library common to all the gEDA tools
...
Submitted by: bruno.schwander@technologist.com
2001-04-07 00:09:57 +00:00
Ying-Chieh Liao
bb9c476eb6
add vipec
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ViPEC is a powerful tool for the analysis of high frequency, linear electrical networks
2001-04-03 05:30:51 +00:00
Akinori MUSHA
0aaeab888e
Add oregano, schematic capture and simulation of electrical circuits.
...
PR: ports/25202
Submitted by: Anders Andersson <anders@codefactory.se>
2001-03-07 11:00:31 +00:00
Ying-Chieh Liao
7bf8e1d6ec
add iverilog, a Verilog simulation and synthesis tool
2001-02-13 11:02:15 +00:00
Greg Lehey
9635aa5387
SCEPTRE (System for Circuit Evaluation and Prediction of Transient
...
Radiation Effects) is a general purpose circuit analysis program which
provides all three major analyses, AC, DC, and transient analysis, on
either linear or nonlinear networks. It employs a free-form input
language and state variable methods to simulate problems of interest
to electrical engineers.
Requested-by: "Pedro F. Giffuni" <pfg1+@pitt.edu>
2001-02-11 06:58:11 +00:00
SADA Kenji
bf66fc5159
Activate Electric.
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PR: ports/18380
Submitted by: Mario Sergio Fujikawa Ferreira <lioux@linf.unb.br>
2000-07-30 07:14:47 +00:00
Ade Lovett
51e78bed9c
Add PISCES, a two-dimensional device simulator which includes
...
models for surface mobility, impact ionization and photo-generation.
Quasi-three-dimensional simulation of cylindrically-symmetric devices is
also supported.
PR: 14686
Submitted by: Gianlorenzo Masini <masini@uniroma3.it>
2000-05-03 14:59:53 +00:00
Steve Price
55faf4942d
cider version 1b1
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A mixed-level circuit and device simulator (includes SPICE3).
PR: 15462
Submitted by: AMAKAWA Shuhei <amakawa@jp.FreeBSD.org>
1999-12-25 15:40:48 +00:00
Thomas Gellekum
617acea261
New port QCad, a 2D-CAD program. Uses Qt-2.
1999-12-22 10:40:56 +00:00
David E. O'Brien
fe1e09a6cc
Change Id->FreeBSD.
1999-08-25 04:58:03 +00:00
Steve Price
f90dfc50e8
Activate the tkgate port.
1999-06-06 17:12:34 +00:00
Satoshi Asami
75e0c6c35e
Sort entries. In particular, "large", "medium", "small" sort in this order,
...
dispite their meanings. (Sometimes we're too smart for computers. :)
Found by: sorting ports/INDEX by "sort -t '|' +1 -2"
(Note: the whole "x11" category appears at the end with the above sort
command, but I'll leave that the way it is for now -- "ls" shows it
before other x11-* entries.)
1998-12-07 02:22:12 +00:00
Vanilla I. Shu
7c5cb28323
Activate geda.
1998-12-06 14:13:23 +00:00
Guy Helmer
2c26d9e848
Enable sis, a new circuit emulator port.
1998-07-01 15:40:47 +00:00
Matthew Hunt
6ae8c69099
Activate xcircuit.
1998-05-18 04:21:53 +00:00
Thomas Gellekum
7ff48bbb2e
Activate kaskade.
1997-11-17 10:53:52 +00:00
Satoshi Asami
9817133d7c
Add felt.
1997-01-15 07:49:06 +00:00
David E. O'Brien
405dd2c62f
Turn on mars and lprps
1996-11-25 01:24:47 +00:00
Thomas Gellekum
115800797c
Add spice.
1996-05-23 08:29:27 +00:00
Satoshi Asami
750d5b551b
Add chipmunk, convert to new format along the way.
1995-08-25 10:06:06 +00:00
Satoshi Asami
c9dc84a522
Clean up subdir Makefiles. They now all look like this:
...
=====
# Id line
#
# RESTRICTED: restricted_port_1 (comment1)
# RESTRICTED: restricted_port_2 (comment2)
#
# BROKEN: broken_port_3 (comment3)
# BROKEN: broken_port_4 (comment4)
# BROKEN: broken_port_5 (comment5)
#
SUBDIR= good_port_1 good_port_2 ...
=====
Basically, the idea is to make it easy to find restricted or broken
ports by doing a "grep".
1995-05-14 03:30:07 +00:00
Jordan K. Hubbard
7c903ca232
Alphabetize.
1995-01-13 14:00:40 +00:00
Jordan K. Hubbard
5e89d8e7e6
New cad group
1995-01-13 11:10:43 +00:00